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參數(shù)資料
| 型號： | AD9888KS-140 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 消費家電 |
| 英文描述： | TRI N PLUG F 2-13 |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP128 |
| 封裝： | PLASTIC, MQFP-128 |
| 文件頁數(shù)： | 24/32頁 |
| 文件大小： | 249K |
| 代理商： | AD9888KS-140 |
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REV. A
AD9888
–24–
14
7
This bit is used to indicate when activity is detected on
the selected Hsync input pin. If HSYNC is held high or
low, activity will not be detected.
Hsync Detect
Table XXV. Hsync Detection Results
Detect
Function
0
1
No Activity Detected
Activity Detected
The sync processing block diagram shows where this
function is implemented.
6
AHS – Active Hsync
This bit indicates which Hsync input source is being used
by the PLL (Hsync input or Sync-on-Green). Bits 7 and 1
in this register are what determine which source is used. If
both Hsync and SOG are detected, the user can determine
which has priority via Bit 3 in Register 0EH. The user can
override this function via Bit 4 in Register 0EH. If the
override bit is set to Logic 1, then this bit will be forced to
whatever the state of Bit 3 in register 0EH is set to.
14
Table XXVI. Active Hsync Results
Bit 7
(Hsync
Detect)
Bit 1
(SOG
Detect)
Bit 4, Reg
OEH
(Override)
AHS
0
0
1
1
X
0
1
0
1
X
0
0
0
0
1
Bit 3 in 0EH
1
0
Bit 3 in 0EH
Bit 3 in 0EH
AHS = 0 means use the HSYNC pin input for HSYNC.
AHS = 1 means use the SOG pin input for HSYNC.
The override bit is in Register 0EH, Bit 4.
5
Detected Hsync Input Polarity Status
This bit reports the status of the HSYNC input polarity
detection circuit. It can be used to determine the polarity
of the HSYNC input. The detection circuit’s location is
shown in the Sync Processing Block Diagram (Figure 25).
14
Table XXVII. Detected Hsync Input Polarity Status
HSYNC Polarity Status
Result
0
1
Hsync Polarity is Negative.
Hsync Polarity is Positive.
14
4
This bit is used to indicate when activity is detected on
the selected Vsync input pin. If Vsync is held high or low,
activity will not be detected.
Vsync Detect
Table XXVIII. Vsync Detection Results
Detect
Function
0
1
No Activity Detected
Activity Detected
The sync processing block diagram (Figure 25) shows where
this function is implemented.
14
3
AVS – Active Vsync
This bit indicates which Vsync source is being used; the
Vsync input or the output from the sync separator. Bit 4
in this register is what determines which is active. If both
Vsync and SOG are detected, the user can determine
which has priority via Bit 0 in Register 0EH. The user can
override this function via Bit 1 in Register 0EH. If the
override bit is set to Logic 1, this bit will be forced to
whatever the state of Bit 0 in Register 0EH is set to.
Table XXIX. Active Vsync Results
Bit 5 (Vsync Detect)
Override
AVS
0
1
X
0
0
1
1
0
Bit 0 in 0EH
AVS = 1 means Sync separator.
AVS = 0 means Vsync input.
The override bit is in Register 0EH, Bit 1.
2
Detected Vsync Output Polarity Status
This bit reports the status of the Vsync output polarity
detection circuit. It can be used to determine the polarity
of the Vsync input. The detection circuit’s location is
shown in the Sync Processing Block Diagram (Figure 25).
14
Table XXX. Detected Vsync Input Polarity Status
Vsync Polarity Status
Result
0
1
Vsync Polarity is Active Low
Vsync Polarity is Active High
14
1
This bit is used to indicate when Sync activity is detected
on the selected Sync-on-Green input pin.
Sync-on-Green Detect
Table XXXI. Sync-on-Green Detection Results
Detect
Function
0
1
No Activity Detected
Activity Detected
The Sync Processing Block Diagram (Figure 25) shows
where this function is implemented.
0
Detected COAST Polarity Status
This bit reports the status of the coast input polarity de-
tection circuit. It can be used to determine the polarity
of the COAST input. The detection circuit’s location is
shown in Figure 25.
14
Table XXXII. Detected COAST Input Polarity Status
HSYNC Polarity Status
Result
0
1
COAST Polarity is Negative.
COAST Polarity is Positive.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AD9888KS-170 | 制造商:Analog Devices 功能描述:ADC Triple 170Msps 8-bit Parallel 128-Pin MQFP 制造商:Rochester Electronics LLC 功能描述:170MHZ ANALOG GRAPHICS INTERFACE CHIP - Bulk 制造商:Analog Devices 功能描述:IC INTERFACE GRAPHIC |
| AD9888KS-205 | 制造商:Analog Devices 功能描述:ADC Triple 205Msps 8-bit Parallel 128-Pin MQFP 制造商:Rochester Electronics LLC 功能描述:205MHZ ANALOG GRAPHICS INTERFACE CHIP - Bulk 制造商:Analog Devices 功能描述:IC INTERFACE GRAPHIC |
| AD9888KSZ-100 | 功能描述:IC FLAT PANEL INTERFACE 128-MQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 特色產(chǎn)品:NXP - I2C Interface 標準包裝:1 系列:- 應用:2 通道 I²C 多路復用器 接口:I²C，SM 總線 電源電壓:2.3 V ~ 5.5 V 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應商設備封裝:16-TSSOP 包裝:剪切帶 (CT) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:825 (CN2011-ZH PDF) 其它名稱:568-1854-1 |
| AD9888KSZ-140 | 功能描述:IC FLAT PANEL INTERFACE 128-MQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 特色產(chǎn)品:NXP - I2C Interface 標準包裝:1 系列:- 應用:2 通道 I²C 多路復用器 接口:I²C，SM 總線 電源電壓:2.3 V ~ 5.5 V 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應商設備封裝:16-TSSOP 包裝:剪切帶 (CT) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:825 (CN2011-ZH PDF) 其它名稱:568-1854-1 |
| AD9888KSZ-140 | 制造商:Analog Devices 功能描述:IC ANALOG INTERFACE |
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