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參數(shù)資料
| 型號(hào)： | AD9853-65PCB |
| 廠(chǎng)商： | Analog Devices, Inc. |
| 英文描述： | Programmable Digital OPSK/16-QAM Modulator |
| 中文描述： | 可編程數(shù)字OPSK/16-QAM調(diào)制器 |
| 文件頁(yè)數(shù)： | 12/31頁(yè) |
| 文件大?。?/td> | 335K |
| 代理商： | AD9853-65PCB |
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AD9853
–12–
REV. C
NOTES ON BURST TRANSMISSION OPERATION:
1. PACKET LENGTH = NUMBER OF INFORMATION BYTES, K
2. IN FEC MODE T
X
ENABLE MUST BE KEPT HIGH FOR N
3
(K+2T) BYTES WHERE N IS THE NUMBER OF CODEWORDS
3. IF NECESSARY, ZERO FILL THE LAST CODEWORD TO REACH ASSIGNED K DATA BYTES PER CODEWORD
4. THE INPUT DATA IS SAMPLED AT THE BIT RATE FREQUENCY (f
B
) WITH THE FIRST SAMPLE TAKEN AT 2
RISING EDGE OF T
X
ENABLE
5. PREAMBLE DELAY =
6. DATA RATE MUST BE EXACT SUB-MULTIPLE OF REFERENCE CLOCK.
1
3
(f
B
)
(# OF PREAMBLE BITS)
(BIT RATE FREQUENCY)
FRAME STRUCTURE: MIN T
ENABLE LOW TIME = PREAMBLE + 8 SYMBOLS. (EQUATES TO 8 SYMBOLS
MINIMUM SPACING BETWEEN BURSTS WITH NO CHANGE IN PROFILE)
T
X
ENABLE
NOTE: DATA RATE MUST BE PRECISELY
SYNCHRONIZED WITH RISING EDGE
OF T
X
ENABLE
D1
D2
D3
D4
D5
D6
D7
DN
DON'T CARE
D1
D2
D3
D4
D5
D6
D7 DN
DON'T CARE
DATA PACKET = K BYTES
FEC PARITY
FEC PARITY
DATA PACKET = K BYTES
T
X
ENABLE TO
A
OUT
LATENCY
DATA IN
INTERNAL CODE-
WORD STRUCTURE
AT R-S OUTPUT
FRAME STRUCTURE FOR MULTIPLE CODE WORDS OR CONTINOUS TRANSMISSION:
D1
D2
D3
D4
D5
D6
D7 DN
DON'T CARE
D1
D2
D3 D4
D5
D6
D7 DN
DON'T CARE
DATA PACKET = K BYTES
FEC PARITY
DATA PACKET = K BYTES
FEC PARITY
T
X
ENABLE
DATA IN
INPUT DATA PROCESSING:
T
X
ENABLE
D1
D59
DN
D60
D61
D62
D63
D64
D65
D1
D2
D2
D3
D4
D5
DATA
PACKET
AND
FEC PARITY
CODEWORD(S)
PREAMBLE
COMPLETE FRAME AS PRESENTED TO MODULATOR ENCODER:
INTERNAL
BIT CLOCK
DATA IN
ENCODER
INPUT
PREAMBLE LENGTH = 96 BITS MAXIMUM
DURING THIS INTERVAL THE DATA IS R-S ENCODED, RANDOMIZED, AND
DELAYED TO SYNCHRONIZE WITH THE END OF THE PREAMBLE DATA.
ONE CODEWORD
ONE CODEWORD
PREAMBLE INSERTION
Figure 26. Data Framing and Processing
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD9853AS | Programmable Digital OPSK/16-QAM Modulator |
| AD9854ASQ | CMOS 300 MHz Quadrature Complete-DDS |
| AD9854AST | CMOS 300 MHz Quadrature Complete-DDS |
| AD9856AST | CMOS 200 MHz Quadrature Digital Upconverter |
| AD9856 | CMOS 180 MHz Quadrature Digital Upconverter(時(shí)鐘頻率為180MHz,CMOS的積分上變頻器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9853AS | 制造商:Analog Devices 功能描述: 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| AD9854 | 制造商:AD 制造商全稱(chēng):Analog Devices 功能描述:CMOS 300 MHz Quadrature Complete-DDS |
| AD9854/PCB | 制造商:Analog Devices 功能描述:Evaluation Board For IC Digital Synthesizer Single 制造商:Analog Devices 功能描述:Direct Digital Synthesizer IC (DDS) |
| AD9854/PCBZ | 功能描述:BOARD EVAL FOR AD9854 RoHS:是 類(lèi)別:編程器，開(kāi)發(fā)系統(tǒng) >> 評(píng)估演示板和套件 系列:AgileRF™ 標(biāo)準(zhǔn)包裝:1 系列:PCI Express® (PCIe) 主要目的:接口，收發(fā)器，PCI Express 嵌入式:- 已用 IC / 零件:DS80PCI800 主要屬性:- 次要屬性:- 已供物品:板 |
| AD9854ASQ | 制造商:Analog Devices 功能描述:IC DDS SYNTHESIZER |
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