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參數(shù)資料
| 型號： | AD9787-DPG2-EBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 35/64頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVALUATION FOR AD9787 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | * |
| DAC 的數(shù)量： | 2 |
| 位數(shù)： | 14 |
| 采樣率（每秒）： | 800M |
| 數(shù)據(jù)接口： | 串行 |
| 設(shè)置時間： | 22ms |
| DAC 型： | 電流 |
| 工作溫度： | -40°C ~ 85°C |
| 已供物品： | * |
| 已用 IC / 零件： | AD9787 |
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AD9785/AD9787/AD9788
Rev. A | Page 40 of 64
QUADRATURE MODULATOR
The quadrature modulator is used to mix the carrier signal
generated by the NCO with the upsampled I and Q data
provided by the user at the 16-bit parallel input port of the
device. Figure 58 shows a detailed block diagram of the
quadrature modulator.
The NCO provides a quadrature carrier signal with a frequency
determined by the 32-bit frequency tuning word (FTW) set in
Register 0x0A, Bits [31:0]. The NCO operates at the rate equal
to the upsampled I data and Q data. The generated carrier
signal is mixed via multipliers with the I data and Q data. The
quadrature products are then summed.
Note that the sine output of the NCO contains a mux that
allows negating of the data. The mux is controlled with a
spectral inversion bit that the user stores in an I/O register
(Register 0x01, Bit 10). The default condition is to select
negated sine data.
NUMERICALLY CONTROLLED OSCILLATOR
The NCO generates a complex carrier signal to translate the
input signal to a new center frequency. A complex carrier signal
is a pair of sinusoidal waveforms of the same frequency, offset
90° from each other. The frequency of the complex carrier
signal is set via the Frequency Tuning Word [31:0] value in
Register 0x0A. The frequency of the complex carrier signal is
calculated as follows:
If {0 ≤ FTW ≤ 231}, use fCENTER = (FTW) (fDACCLK)/232
If {231 < FTW < 232 1}, use fCENTER = fDACCLK × (1 (FTW/232))
A 16-bit phase offset may be added to the output of the phase
accumulator via the serial port. This static phase adjustment
results in an output signal that is offset by a constant angle
relative to the nominal signal. This allows the user to phase
align the NCO output with some external signal, if necessary.
This can be especially useful when NCOs of multiple AD9785/
AD9787/AD9788 devices are programmed for synchronization.
The phase offset allows for the adjustment of the output timing
between the devices. The static phase adjustment is sourced
from the NCO Phase Offset Word [15:0] value located in
Register 0x0B.
By default, when an SPI write is completed for the frequency
tuning word, phase control, DAC gain scaling, or DAC offset
registers (Register 0x0A through Register 0x0D), the operation
of the AD9785/AD9787/AD9788 is immediately updated to
reflect these changes. However, in many applications it may be
more useful to update these registers without changing the
device operation until all these functions can be updated at
once. With the automatic I/O transfer enable bit set low in the
COMM register (Register 0x00, Bit 1), the value of all these
functions is stored in a buffer after the initial SPI write. To
update all these functions simultaneously, Bit 2 of the COMM
register should be set. This bit is self-resetting and thus does not
require another reset in a later SPI write.
INVERSE SINC FILTER
The inverse sinc filter is implemented as a nine-tap FIR filter. It
is designed to provide greater than ±0.05 dB pass-band ripple
up to a frequency of 0.4 × fDACCLK. To provide the necessary
peaking at the upper end of the pass band, the inverse sinc filter
has an intrinsic insertion loss of 3.4 dB. The tap coefficients are
given in Table 31.
INTERPOLATION
NCO
1
0
–1
COSINE
SINE
I
DATA
Q
DATA
FTW [31:0]
SPECTRAL
INVERSION
OUT_I
OUT_Q
+
–
NCO PHASE OFFSET
WORD [15:0]
07
09
8-
10
7
Figure 58. Quadrature Modulator Block Diagram
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|---|---|
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| AD9788 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Dual 12-/14-/16-Bit 800 MSPS DAC with Low Power 32-Bit Complex NCO |
| AD9788BSVZ | 功能描述:IC DAC 16BIT 800MSPS 100TQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:TxDAC® 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:50 系列:- 設(shè)置時間:4µs 位數(shù):12 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP，8-MSOP（0.118"，3.00mm 寬） 供應(yīng)商設(shè)備封裝:8-uMAX 包裝:管件 輸出數(shù)目和類型:2 電壓，單極 采樣率（每秒）:* 產(chǎn)品目錄頁面:1398 (CN2011-ZH PDF) |
| AD9788BSVZRL | 功能描述:IC DAC 16BIT 800MSPS 100TQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:TxDAC® 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1,000 系列:- 設(shè)置時間:1µs 位數(shù):8 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:8 電壓電源:雙 ± 功率耗散（最大）:941mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:24-SOIC W 包裝:帶卷 (TR) 輸出數(shù)目和類型:8 電壓，單極 采樣率（每秒）:* |
| AD9788-DPG2-EBZ | 功能描述:BOARD EVALUATION FOR AD9788 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 數(shù)模轉(zhuǎn)換器 (DAC) 系列:* 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- DAC 的數(shù)量:4 位數(shù):12 采樣率（每秒）:- 數(shù)據(jù)接口:串行，SPI? 設(shè)置時間:3µs DAC 型:電流/電壓 工作溫度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581 |
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