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參數(shù)資料
| 型號： | AD9708-EBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 9/16頁 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR AD9708 |
| 產(chǎn)品培訓模塊： | DAC Architectures |
| 標準包裝： | 1 |
| 系列： | TxDAC® |
| DAC 的數(shù)量： | 1 |
| 位數(shù)： | 8 |
| 采樣率（每秒）： | 125M |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 設(shè)置時間： | 35ns |
| DAC 型： | 電流 |
| 工作溫度： | -40°C ~ 85°C |
| 已供物品： | 板 |
| 已用 IC / 零件： | AD9708 |
| 相關(guān)產(chǎn)品： | AD9708ARZRL-ND - IC DAC 8BIT 100MSPS 28-SOIC AD9708ARZ-ND - IC DAC 8BIT 100MSPS 28-SOIC AD9708ARUZRL7-ND - IC DAC 8BIT 100MSPS 28-TSSOP TR AD9708ARUZ-ND - IC DAC 8BIT 100MSPS 28-TSSOP AD9708ARURL7-ND - IC DAC 8BIT 100MSPS 28-TSSOP AD9708ARU-ND - IC DAC 8BIT 100MSPS 28-TSSOP AD9708AR-ND - IC DAC 8BIT 100MSPS 28-SOIC |
DC SPECIFICATIONS
Parameter
Min
Typ
Max
Units
RESOLUTION
8
Bits
MONOTONICITY
GUARANTEED OVER SPECIFIED TEMPERATURE RANGE
DC ACCURACY
1
Integral Linearity Error (INL)
–1/2
±1/4
+1/2
LSB
Differential Nonlinearity (DNL)
–1/2
±1/4
+1/2
LSB
ANALOG OUTPUT
Offset Error
–0.025
+0.025
% of FSR
Gain Error (Without Internal Reference)
–10
±2
+10
% of FSR
Gain Error (With Internal Reference)
–10
±1
+10
% of FSR
Full-Scale Output Current2
2.0
20.0
mA
Output Compliance Range
–1.0
1.25
V
Output Resistance
100
k
Output Capacitance
5
pF
REFERENCE OUTPUT
Reference Voltage
1.08
1.20
1.32
V
Reference Output Current3
100
nA
REFERENCE INPUT
Input Compliance Range
0.1
1.25
V
Reference Input Resistance
1
M
Small Signal Bandwidth (w/o CCOMP1)
4
1.4
MHz
TEMPERATURE COEFFICIENTS
Offset Drift
0
ppm of FSR/
°C
Gain Drift (Without Internal Reference)
±50
ppm of FSR/
°C
Gain Drift (With Internal Reference)
±100
ppm of FSR/
°C
Reference Voltage Drift
±50
ppm/
°C
POWER SUPPLY
Supply Voltages
AVDD5
2.7
5.0
5.5
V
DVDD
2.7
5.0
5.5
V
Analog Supply Current (IAVDD)25
30
mA
Digital Supply Current (IDVDD)
6
36
mA
Supply Current Sleep Mode (IAVDD)
8.5
mA
Power Dissipation6 (5 V, IOUTFS = 20 mA)
140
175
mW
Power Dissipation7 (5 V, IOUTFS = 20 mA)
190
mW
Power Dissipation7 (3 V, IOUTFS = 2 mA)
45
mW
Power Supply Rejection Ratio—AVDD
–0.4
+0.4
% of FSR/V
Power Supply Rejection Ratio—DVDD
–0.025
+0.025
% of FSR/V
OPERATING RANGE
–40
+85
°C
NOTES
1Measured at IOUTA, driving a virtual ground.
2Nominal full-scale current, I
OUTFS, is 32 × the I REF current.
3Use an external buffer amplifier to drive any external load.
4Reference bandwidth is a function of external cap at COMP1 pin.
5For operation below 3 V, it is recommended that the output current be reduced to 12 mA or less to maintain optimum performance.
6Measured at f
CLOCK = 50 MSPS and fOUT = 1.0 MHz.
7Measured as unbuffered voltage output into 50
R
LOAD at IOUTA and IOUTB, fCLOCK = 100 MSPS and fOUT = 40 MHz.
Specifications subject to change without notice.
(TMIN to TMAX , AVDD = +5 V, DVDD = +5 V, IOUTFS = 20 mA, unless otherwise noted)
–2–
REV. B
AD9708–SPECIFICATIONS
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