參數(shù)資料
型號(hào): AD9633BCPZ-105
廠商: Analog Devices Inc
文件頁數(shù): 34/40頁
文件大小: 0K
描述: IC ADC 12BIT SRL 105MSPS 48LFCSP
標(biāo)準(zhǔn)包裝: 1
位數(shù): 12
采樣率(每秒): 105M
數(shù)據(jù)接口: LVDS,串行,SPI?
轉(zhuǎn)換器數(shù)目: 4
功率耗散(最大): 473mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-WFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 48-LFCSP-WQ(7x7)
包裝: 托盤
輸入數(shù)目和類型: 4 個(gè)差分,雙極
AD9633
Data Sheet
Rev. 0 | Page 4 of 40
AC SPECIFICATIONS
AVDD = 1.8 V, DRVDD = 1.8 V, 2 V p-p differential input, 1.0 V internal reference, AIN = 1.0 dBFS, unless otherwise noted.
Table 2.
Parameter1
Temp
AD9633-80
AD9633-105
AD9633-125
Unit
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
SIGNAL-TO-NOISE RATIO (SNR)
fIN = 9.7 MHz
25°C
71.7
71.8
dBFS
fIN = 30.5 MHz
25°C
71.7
71.6
71.4
dBFS
fIN = 70 MHz
Full
70.0
70.5
70.2
71.0
70.5
71.1
dBFS
fIN = 140 MHz
25°C
70.3
70.2
70.0
dBFS
fIN = 200 MHz
25°C
69.4
69.8
69.4
dBFS
SIGNAL-TO-NOISE-AND-DISTORTION RATIO (SINAD)
fIN = 9.7 MHz
25°C
71.6
71.1
dBFS
fIN = 30.5 MHz
25°C
71.5
71.3
dBFS
fIN = 70 MHz
Full
69.0
70.4
68.5
70.9
69.5
71.0
dBFS
fIN = 140 MHz
25°C
70.2
69.9
dBFS
fIN = 200 MHz
25°C
68.4
68.7
67.4
dBFS
EFFECTIVE NUMBER OF BITS (ENOB)
fIN = 9.7 MHz
25°C
11.6
11.5
Bits
fIN = 30.5 MHz
25°C
11.6
11.5
Bits
fIN = 70 MHz
Full
11.5
11.6
11.5
Bits
fIN = 140 MHz
25°C
11.4
11.3
Bits
fIN = 200 MHz
25°C
11.2
10.9
Bits
SPURIOUS-FREE DYNAMIC RANGE (SFDR)
fIN = 9.7 MHz
25°C
96
94
dBc
fIN = 30.5 MHz
25°C
90
89
91
dBc
fIN = 70 MHz
Full
76
96
75
87
75
91
dBc
fIN = 140 MHz
25°C
87
91
86
dBc
fIN = 200 MHz
25°C
86
88
86
dBc
WORST HARMONIC (SECOND OR THIRD)
fIN = 9.7 MHz
25°C
96
94
dBc
fIN = 30.5 MHz
25°C
90
89
91
dBc
fIN = 70 MHz
Full
96
76
87
75
91
75
dBc
fIN = 140 MHz
25°C
87
91
86
dBc
fIN = 200 MHz
25°C
86
88
86
dBc
WORST OTHER HARMONIC (EXCLUDING SECOND OR THIRD)
fIN = 9.7 MHz
25°C
98
97
95
dBFS
fIN = 30.5 MHz
25°C
96
94
98
dBFS
fIN = 70 MHz
Full
97
82
95
82
97
84
dBFS
fIN = 140 MHz
25°C
98
94
93
dBFS
fIN = 200 MHz
25°C
97
94
91
dBFS
TWO-TONE INTERMODULATION DISTORTION (IMD)—AIN1 AND
AIN2 = 7.0 dBFS
fIN1 = 70.5 MHz, fIN2 = 72.5 MHz
25°C
85
86
87
dBc
CROSSTALK2
Full
95
dB
CROSSTALK (OVERRANGE CONDITION)3
25°C
89
dB
POWER SUPPLY REJECTION RATIO (PSRR)1, 4
AVDD
25°C
52
dB
DRVDD
25°C
75
dB
ANALOG INPUT BANDWIDTH, FULL POWER
25°C
650
MHz
1 See the AN-835 Application Note, Understanding High Speed ADC Testing and Evaluation, for definitions and for details on how these tests were completed.
2 Crosstalk is measured at 70 MHz with 1.0 dBFS analog input on one channel and no input on the adjacent channel.
3 Overrange condition is specified with 3 dB of the full-scale input range.
4 PSRR is measured by injecting a sinusoidal signal at 10 MHz to the power supply pin and measuring the output spur on the FFT. PSRR is calculated as the ratio of the
amplitudes of the spur voltage over the pin voltage, expressed in decibels.
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