t
參數(shù)資料
型號: AD9629BCPZRL7-80
廠商: Analog Devices Inc
文件頁數(shù): 31/32頁
文件大小: 0K
描述: IC ADC 12BIT 80MSPS 32LFCSP
標(biāo)準(zhǔn)包裝: 1,500
位數(shù): 12
采樣率(每秒): 80M
數(shù)據(jù)接口: 串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 100mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 32-LFCSP-VQ
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 2 個單端,單極;1 個差分,單極
AD9629
Rev. 0 | Page 8 of 32
TIMING SPECIFICATIONS
Table 5.
Parameter
Conditions
Min
Typ
Max
Unit
SPI TIMING REQUIREMENTS
tDS
Setup time between the data and the rising edge of SCLK
2
ns
tDH
Hold time between the data and the rising edge of SCLK
2
ns
tCLK
Period of the SCLK
40
ns
tS
Setup time between CSB and SCLK
2
ns
tH
Hold time between CSB and SCLK
2
ns
tHIGH
SCLK pulse width high
10
ns
tLOW
SCLK pulse width low
10
ns
tEN_SDIO
Time required for the SDIO pin to switch from an input to an
output relative to the SCLK falling edge
10
ns
tDIS_SDIO
Time required for the SDIO pin to switch from an output to an
input relative to the SCLK rising edge
10
ns
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