參數(shù)資料
型號: AD9432BST-80
廠商: ANALOG DEVICES INC
元件分類: ADC
英文描述: 12-Bit, 80 MSPS/105 MSPS A/D Converter
中文描述: 1-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP52
封裝: PLASTIC, LQFP-52
文件頁數(shù): 4/16頁
文件大?。?/td> 431K
代理商: AD9432BST-80
REV. B
AD9432
–4–
52 51 50 49 48
43 42 41 40
47 46 45 44
14 15 16 17 18 19 20 21 22 23 24 25 26
O
D
1
2
3
4
5
6
7
8
9
10
11
13
12
PIN 1
(TOP VIEW
39
38
37
36
35
34
33
32
31
30
29
28
27
G
GND
V
CC
GND
GND
V
CC
V
CC
GND
GND
V
CC
V
CC
GND
GND
GND
V
DD
DGND
D0 (LSB)
D1
D2
D3
AD9432
ENCODE
GND
ENCODE
V
CC
GND
DGND
V
DD
(
D
D
D
D
D
V
D
V
D
D
D
D
D
V
C
G
V
V
V
C
A
A
G
G
V
C
V
C
EXPLANATION OF TEST LEVELS
Test Level
I
100% production tested.
II
100% production tested at +25
°
C and sample tested at
specified temperatures.
III Sample tested only.
IV
Parameter is guaranteed by design and characterization
testing.
V
Parameter is a typical value only.
VI
100% production tested at +25
°
C; guaranteed by design
and characterization testing for industrial temperature
range.
PIN CONFIGURATION
PIN FUNCTION DESCRIPTIONS
Pin Number
AD9432BST
Name
Function
1, 3, 4, 9, 11, 33, 34, 35, 38, 39, 40, 43, 48, 51
2, 5, 6, 10, 36, 37, 42, 44, 47, 52
7
8
14
15–20, 25–30
12, 21, 24, 31
13, 22, 23, 32
41
45
46
49
50
GND
V
CC
ENCODE
ENCODE
OR
D11–D6, D5–D0 Digital Output.
DGND
V
DD
DNC
VREFIN
VREFOUT
AIN
AIN
Analog Ground.
Analog Supply (+5 V).
Encode Clock for ADC–Complementary.
Encode Clock for ADC–True (ADC samples on rising edge of ENCODE).
Out of Range Output.
Digital Output Ground.
Digital Output Power Supply (2.7 V to 3.6 V).
Do Not Connect.
Reference Input for ADC (2.5 V Typical); Bypass with 0.1
μ
F to Ground.
Internal Reference Output (2.5 V Typical).
Analog Input–True.
Analog Input–Complementary.
DEFINITION OF SPECIFICATIONS
Analog Bandwidth (Small Signal)
The analog input frequency at which the spectral power of the
fundamental frequency (as determined by the FFT analysis) is
reduced by 3 dB.
Aperture Delay
The delay between a differential crossing of ENCODE and
ENCODE
and the instant at which the analog input is sampled.
Aperture Uncertainty (Jitter)
The sample-to-sample variation in aperture delay.
Differential Nonlinearity
The deviation of any code from an ideal 1 LSB step.
Encode Pulsewidth/Duty Cycle
Pulsewidth high is the minimum amount of time that the
ENCODE pulse should be left in Logic “1” state to achieve
rated performance; pulsewidth low is the minimum time
ENCODE pulse should be left in low state. At a given clock
rate, these specs define an acceptable Encode duty cycle.
Integral Nonlinearity
The deviation of the transfer function from a reference line
measured in fractions of 1 LSB using a “best straight line”
determined by a least square curve fit.
Minimum Conversion Rate
The encode rate at which the SNR of the lowest analog signal
frequency drops by no more than 3 dB below the guaranteed
limit.
Maximum Conversion Rate
The encode rate at which parametric testing is performed.
Output Propagation Delay
The delay between a differential crossing of ENCODE and
ENCODE
and the time when all output data bits are within
valid logic levels.
Power Supply Rejection Ratio
The ratio of a change in input offset voltage to a change in
power supply voltage.
Signal-to-Noise Plus Distortion (SINAD)
The ratio of the rms signal amplitude (set at 1 dB below full
scale) to the rms value of the sum of all other spectral compo-
nents, including harmonics but excluding dc.
Signal-to-Noise Ratio (SNR)
The ratio of the rms signal amplitude (set at 1 dB below full
scale) to the rms value of the sum of all other spectral compo-
nents, excluding the first five harmonics and dc.
相關(guān)PDF資料
PDF描述
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