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參數(shù)資料
| 型號： | AD9430BSV-170 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | 12-Bit, 170 MSPS 3.3V A/D Converter |
| 中文描述： | 1-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP100 |
| 封裝： | PLASTIC, MS-026-AED, TQFP-100 |
| 文件頁數(shù)： | 8/20頁 |
| 文件大?。?/td> | 1594K |
| 代理商： | AD9430BSV-170 |
PRELIMINARY TECHNICAL DATA
AD9430
-8- 4/01/2002 REV. PrG
PIN FUNCTION DESCRIPTIONS (CMOS mode)
CMOS Mode
Pin Number
2,7,42,43,65,66,68
1
Name
Function in CMOS Mode
DNC
S5
Do not connect
Full Scale Adjust pin : ‘1’ sets FS =
.766 V
pp differential,
‘0’ sets FS =
1.533 V
pp differential
Interlaced or parallel output mode. (only in Dual Port mode
operation) HIGH = data arrives in channel A at falling edge of clock
and data arrives in channel A at rising edge of clock. LOW = data
arrives in channels A and B at rising edge of clock.
Output Mode select. Low = Dual Port, CMOS; High = LVDS
Data format select. Low = Binary, High = Two’s compliment
3.3V analog supply. (3.0V to 3.6V)
3
S4
5
6
8,14,15,18,19,24,27,28,29,34,
39,40,88,89,90,94,95,98,99
4,9,12,13,16,17,20,23,25,26,3
0,31,35,38,41,86,87,91,92,93,
96,97,100
10
11
21
22
32
S2
S1
AV
DD
AGND
Analog Ground
SENSE
VREF
VIN+
VIN-
DS+
Control Pin for Reference , Full Scale
1.235 Reference I/O - function dependent on REFSENSE
Analog input – true.
Analog input – compliment.
Data sync (input) – true. Aligns output channels so that data from
channel A represents a sample that is prior from data in channel B,
taking into account the pipeline delay. (See timing diagram). Tie
LOW if not used.
Data sync (input) – compliment. Tie HIGH if not used.
Clock input – true.
Clock input – compliment.
B Port Output Data Bit (LSB)
B Port Output Data Bit
B Port Output Data Bit
B Port Output Data Bit
B Port Output Data Bit
B Port Output Data Bit
B Port Output Data Bit
B Port Output Data Bit
B Port Output Data Bit
B Port Output Data Bit
B Port Output Data Bit
B Port Output Data Bit (MSB)
B Port Overrange
Digital ground.
3.3V digital output supply. (3.0V to 3.6V)
Data Clock output – compliment.
Data Clock output – true.
A port Output Data Bit (LSB)
A port Output Data Bit
A port Output Data Bit
A port Output Data Bit
A port Output Data Bit
A port Output Data Bit
A port Output Data Bit
A port Output Data Bit
A port Output Data Bit
A port Output Data Bit
A port Output Data Bit
A port Output Data Bit (MSB)
A port Overrange
33
36
37
44
45
46
49
50
51
52
55
56
57
58
59
60
48,53,61,67,74,82
47,54,62,75,83
63
64
69
70
71
72
73
76
77
78
79
80
81
84
85
DS-
ENC+
ENC-
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
DB8
DB9
DB10
DB11
OR_B
DrGND
DrV
DD
DCO-
DCO+
DA0
DA1
DA2
DA3
DA4
DA5
DA6
DA7
DA8
DA9
DA10
DA11
OR_A
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| AD9430BSVZ-170 | 功能描述:IC ADC 12BIT 170MSPS 3.3V100TQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 其它有關(guān)文件:TSA1204 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):12 采樣率（每秒）:20M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:155mW 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應(yīng)商設(shè)備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數(shù)目和類型:4 個(gè)單端，單極；2 個(gè)差分，單極 產(chǎn)品目錄頁面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6 |
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| AD9430BSVZ-210 | 制造商:Analog Devices 功能描述:ADC Single Pipelined 210Msps 12-bit Parallel 100-Pin TQFP EP 制造商:Analog Devices 功能描述:ADC SGL PIPELINED 210MSPS 12-BIT PARALLEL 100TQFP EP - Trays 制造商:Analog Devices 功能描述:ADC Single Pipelined 210MSPS 12-Bit Parallel 100-Pin TQFP EP Tray 制造商:Analog Devices 功能描述:IC ADC 12BIT 210MSPS TQFP-100 制造商:Analog Devices Inc. 功能描述:Analog to Digital Converters - ADC 12Bit 210 Msps ADC 制造商:Analog Devices 功能描述:IC, ADC, 12BIT, 210MSPS, TQFP-100; Resolution (Bits):12bit; Sampling Rate:210MSPS; Supply Voltage Type:Single; Supply Voltage Min:3.2V; Supply Voltage Max:3.6V; Supply Current:390mA; Digital IC Case Style:TQFP; No. of Pins:100 ;RoHS Compliant: Yes 制造商:Analog Devices 功能描述:CONVERTER - ADC 制造商:Analog Devices 功能描述:ADC,AD9430B 12bit 210MSPS TQFP |
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