參數(shù)資料
型號: AD9300KQ
廠商: ANALOG DEVICES INC
元件分類: 運動控制電子
英文描述: 4 x 1 Wideband Video Multiplexer
中文描述: 4-CHANNEL, VIDEO MULTIPLEXER, CDIP16
封裝: CERDIP-16
文件頁數(shù): 5/8頁
文件大?。?/td> 158K
代理商: AD9300KQ
AD9300
–5–
REV. A
T HE ORY OF OPE RAT ION
Refer to the functional block diagram of the AD9300.
As shown in the drawing, this diagram is based on the pinouts of
the DIP packaging of the models AD9300K Q and AD9300T Q.
T he AD9300K P and AD9300T E are packaged in 20-pin surface
mount packages. T he extra pins are used for ground connections;
the theory of operation remains the same.
T he AD9300 Video Multiplexer allows the user to connect any
one of four analog input channels (IN
1
–IN
4
) to the output of the
device and to switch between channels at megahertz rates.
T he input channel, which is connected to the output is deter-
mined by a 2-bit T T L digital code applied to A
0
and A
1
. T he se-
lected input will not appear at the output unless a digital “1” is
also applied to the ENABLE input pin; unless the output is
enabled, it is a high impedance. Necessary combinations to ac-
complish channel selection are shown in the Logic T ruth T able.
Figure 1. Input and Output Equivalent Circuits
Bipolar construction used in the AD9300 ensures that the input
impedance of the device remains high and will not vary with
power supply voltages. T his characteristic makes the AD9300,
in effect, a switchable-input buffer. An onboard bias network
makes the performance of the AD9300 independent of applied
supply voltages, which can have any nominal value from
±
10 V dc to
±
15 V dc.
Although the primary application for the AD9300 is the routing
of video signals, the harmonic and dynamic attributes of the
device make it appropriate for other applications. T he AD9300
has exceptional performance when switching video signals and
can also be used for switching other analog signals requiring
greater dynamic range and/or precision than those in video.
As shown in Figure 1, each analog input is connected to the
base of a bipolar transistor. If Channel 1 is selected, a current
switch is closed and routes current through the input transistor
for Channel 1.
If Channel 2 is then selected by the digital inputs, the current
switch for Channel 1 is opened and the current switch for Chan-
nel 2 is closed. T his causes current to be routed away from the
Channel 1 transistor and into the Channel 2 input transistor.
Whenever a channel’s input device is carrying current, the ana-
log input applied to that channel is passed to the output stage.
T he operation of the output stage is similar to that of the input
stages. Whenever the output stage is enabled with a HIGH digi-
tal “1” signal at the ENABLE pin, the output transistor will
carry current and pass the selected analog input.
When the output stage is disabled (by virtue of the ENABLE
pin being driven LOW with a digital “0”), the output current
switch is opened. T his routes the current to other circuits within
the AD9300 that keep the output transistor biased “off.” T hese
circuits require approximately 1
μ
A of bias current from the load
connected to the output of the multiplexer. In the absence of a
terminating load and the resulting dc bias, the output of the
AD9300 “floats” at –2.5 V.
In summary, when the AD9300 is enabled by the ENABLE pin
being driven HIGH with a digital “1,” the selected analog input
channel acts as a buffer for the input and the output of the mul-
tiplexer is a low impedance. When the AD9300 is disabled with
a digital “0” LOW signal, the selected channel acts as an open
switch for the input, and the output of the unit becomes a high
impedance. T his characteristic allows the user to wire-or several
AD9300 Analog Multiplexers together to form switch matrices.
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