參數(shù)資料
型號(hào)： AD9281ARS
廠商： ANALOG DEVICES INC
元件分類(lèi)： ADC
英文描述： Dual Channel 8-Bit Resolution CMOS ADC
中文描述： 2-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28
封裝： SSOP-28
文件頁(yè)數(shù)： 4/19頁(yè)
文件大?。?/td> 406K
代理商： AD9281ARS
AD9281
–4–
REV. E
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD9281 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
PIN CONFIGURATION
TOP VIEW
(Not to Scale)
AD9281
REFT-Q
INB-Q
INA-Q
CHIP-SELECT
VREF
AVDD
REFB-Q
REFB-I
AVSS
REFSENSE
REFT-I
SLEEP
INA-I
INB-I
DVSS
DVDD
NC
NC
(LSB) D0
D1
D2
D3
D4
D5
D6
(MSB) D7
SELECT
CLOCK
NC = NO CONNECT
WARNING!
ESD SENSITIVE DEVICE
ABSOLUTE MAXIMUM RATINGS*
With
Respect
to
Parameter
Min
Max
Units
AVDD
DVDD
AVSS
AVDD
CLK
Digital Outputs
AINA, AINB
VREF
REFSENSE
REFT, REFB
Junction Temperature
Storage Temperature
Lead Temperature
10 sec
AVSS
DVSS
DVSS
DVDD
AVSS
DVSS
AVSS
AVSS
AVSS
AVSS
–0.3
–0.3
–0.3
–6.5
–0.3
–0.3
–1.0
–0.3
–0.3
–0.3
+6.5
+6.5
+0.3
+6.5
AVDD + 0.3
DVDD + 0.3
AVDD + 0.3
AVDD + 0.3
AVDD + 0.3
AVDD + 0.3
+150
+150
V
V
V
V
V
V
V
V
V
V
°
C
°
C
–65
+300
°
C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum ratings
for extended periods may effect device reliability.
ORDERING GUIDE
Temperature
Range
Package
Description
Package
Options*
Model
AD9281ARS
AD9281-EB
–40
°
C to +85
°
C
28-Lead SSOP
Evaluation Board
RS-28
*RS = Shrink Small Outline.
PIN FUNCTION DESCRIPTIONS
P
in
No.
Name
Description
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
DVSS
DVDD
NC
NC
D0
D1
D2
D3
D4
D5
D6
D7
SELECT
CLOCK
SLEEP
INA-I
INB-I
REFT-I
REFB-I
AVSS
REFSENSE
VREF
AVDD
REFB-Q
REFT-Q
INB-Q
INA-Q
CHIP-SELECT
Digital Ground
Digital Supply
Not Connected
Not Connected
Bit 0 (LSB)
Bit 1
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7 (MSB)
Hi I Channel Out, Lo Q Channel Out
Clock
Hi Power Down, Lo Normal Operation
I Channel, A Input
I Channel, B Input
Top Reference Decoupling, I Channel
Bottom Reference Decoupling, I Channel
Analog Ground
Reference Select
Internal Reference Output
Analog Supply
Bottom Reference Decoupling, Q Channel
Top Reference Decoupling, Q Channel
Q Channel B Input
Q Channel A Input
Hi-High Impedance, Lo-Normal Operation
DEFINITIONS OF SPECIFICATIONS
INTEGRAL NONLINEARITY (INL)
Integral nonlinearity refers to the deviation of each individual
code from a line drawn from “zero” through “full scale.” The
point used as “zero” occurs 1/2 LSB before the first code transi-
tion. “Full scale” is defined as a level 1 1/2 LSBs beyond the last
code transition. The deviation is measured from the center of
each particular code to the true straight line.
DIFFERENTIAL NONLINEARITY (DNL, NO MISSING
CODES)
An ideal ADC exhibits code transitions that are exactly 1 LSB
apart. DNL is the deviation from this ideal value. It is often
specified in terms of the resolution for which no missing codes
(NMC) are guaranteed.
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PDF描述
AD9283 8-Bit, 50 MSPS/80 MSPS/100 MSPS 3 V A/D Converter
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