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| 型號(hào)： | AD9276-80KITZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 1/48頁 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL HI SPEED FPGA AD9276 |
| 設(shè)計(jì)資源： | AD9276/77 Eval Brd Gerber Files |
| 標(biāo)準(zhǔn)包裝： | 1 |
| ADC 的數(shù)量： | 1 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 80M |
| 數(shù)據(jù)接口： | 串行，SPI? |
| 輸入范圍： | 733 mVpp |
| 在以下條件下的電源（標(biāo)準(zhǔn)）： | 195mW @ 40MSPS |
| 工作溫度： | -40°C ~ 85°C |
| 已用 IC / 零件： | AD9276 |
| 已供物品： | 板 |
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Octal LNA/VGA/AAF/12-Bit ADC
and CW I/Q Demodulator
AD9276
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringementsof patentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
2009 Analog Devices, Inc. All rights reserved.
FEATURES
8 channels of LNA, VGA, AAF, ADC, and I/Q demodulator
Low noise preamplifier (LNA)
Input-referred noise: 0.75 nV/√Hz typical at 5 MHz
(gain = 21.3 dB)
SPI-programmable gain: 15.6 dB/17.9 dB/21.3 dB
Single-ended input: VIN maximum = 733 mV p-p/
550 mV p-p/367 mV p-p
Dual-mode active input impedance matching
Bandwidth (BW) > 100 MHz
Full-scale (FS) output: 4.4 V p-p differential
Variable gain amplifier (VGA)
Attenuator range: 42 dB to 0 dB
Postamp gain: 21 dB/24 dB/27 dB/30 dB
Linear-in-dB gain control
Antialiasing filter (AAF)
Programmable second-order LPF from 8 MHz to 18 MHz
Programmable HPF
Analog-to-digital converter (ADC)
12 bits at 10 MSPS to 80 MSPS
SNR: 70 dB
SFDR: 75 dB
Serial LVDS (ANSI-644, IEEE 1596.3 reduced range link)
Data and frame clock outputs
CW mode I/Q demodulator
Individual programmable phase rotation
Output dynamic range per channel >160 dBFS/√Hz
Low power: 195 mW per channel at 12 bits/40 MSPS (TGC),
94 mW per channel for CW Doppler
Flexible power-down modes
Overload recovery in <10 ns
Fast recovery from low power standby mode: <2 μs
100-lead TQFP_EP
APPLICATIONS
Medical imaging/ultrasound
Automotive radar
PRODUCT HIGHLIGHTS
1.
Small Footprint.
Eight channels are contained in a small, space-saving
package. Full TGC path, ADC, and I/Q demodulator
contained within a 100-lead, 16 mm × 16 mm TQFP.
2.
Low Power.
In TGC mode, low power of 195 mW per channel
at 40 MSPS. In CW mode, ultralow power of 94 mW
per channel.
3.
Integrated High Dynamic Range I/Q Demodulator with
Phase Rotation.
4.
Ease of Use.
A data clock output (DCO±) operates up to 480 MHz
and supports double data rate (DDR) operation.
5.
User Flexibility.
Serial port interface (SPI) control offers a wide range of
flexible features to meet specific system requirements.
6.
Integrated Second-Order Antialiasing Filter.
This filter is placed before the ADC and is programmable
from 8 MHz to 18 MHz.
FUNCTIONAL BLOCK DIAGRAM
AAF
12-BIT
ADC
VGA
LNA
SERIAL
LVDS
I/Q
DEMODULATOR
8 CHANNELS
SERIAL
PORT
INTERFACE
DATA
RATE
MULTIPLIER
REFERENCE
LO
GENERATION
LO-A TO LO-H
LOSW-A TO LOSW-H
LI-A TO LI-H
LG-A TO LG-H
DOUTA+ TO DOUTH+
DOUTA– TO DOUTH–
FCO+
DRVDD
CL
K–
CL
K
+
SD
IO
SC
L
K
CS
B
GP
O[
0:
3]
RBI
AS
VR
E
F
CW
Q
+
CW
Q
–
CW
I+
CW
I–
GA
IN
–
GA
IN
+
4L
O
–
4L
O
+
R
E
SET
STBY
PDWN
AVDD2
AVDD1
FCO–
DCO+
DCO–
08
18
0-
00
1
Figure 1.
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