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參數(shù)資料
| 型號： | AD9260ASZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 19/44頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC CMOS 16BIT OVRSAMP 44MQFP |
| 標準包裝： | 1 |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 20M |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 585mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-QFP |
| 供應商設備封裝： | 44-MQFP（10x10） |
| 包裝： | 托盤 |
| 輸入數(shù)目和類型： | 2 個單端，單極；1 個差分，單極 |
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AD9260
Rev. C | Page 26 of 44
capacitances of the internal CMOS switches. This technique
improves the linearity of the input switches and reduces the
nonlinear parasitic capacitance. Thus, this technique reduces
the nonlinear glitch energy. The capacitance values for the input
capacitors and parasitic capacitors for the input structure of the
AD9260, as illustrated in Figure 61, are listed as follows.
CS = 3.2 pF, Cpa = 6 pF, Cpb = 1 pF (where CS is the
capacitance value of capacitors CS1 and CS2, Cpa is the value of
capacitors Cpa1 and Cpa2, and Cpb is the value of capacitors
Cpb1 and Cpb2). The total capacitance at each input pin is CIN
= CS + Cpa + Cpb = 10.2 pF.
Input Driver Considerations
The optimum noise and distortion performance of the AD9260
can ONLY be achieved when the AD9260 is driven differentially
with a 4 V input span. Since not all applications have a signal
preconditioned for differential operation, there is often a need
to perform a single-ended-to-differential conversion. In the
case of the AD9260, a single-ended-to-differential conversion is
best realized using a differential op amp driver. Although a
transformer will perform a similar function for ac signals, its
usefulness is precluded by its inability to directly drive the
AD9260 and thus the additional requirement of an active low
noise, low distortion buffer stage.
Single-Ended-to-Differential Op Amp Driver
There are two single-ended-to-differential op amp driver
circuits useful for driving the AD9260. The first circuit, shown
in Figure 63, uses the AD8138 and represents the best choice in
most applications. The AD8138 is a low distortion differential
ADC driver designed to convert a ground-referenced single-
ended input signal to a differential output signal with a
specified common-mode level for dc-coupling applications. It is
capable of maintaining the typical THD and SFDR performance
of the AD9260 with only a slight degradation in its noise
performance in the 8 mode (i.e., SNR of 85 dB–86 dB).
In this application, the AD8138 is configured for unity gain and
its common-mode output level is set to 2.5 V, functioning like
the VREF of the AD9260, to maximize its output headroom
while operating from a single supply. Note that the single-
supply operation has the benefit of not requiring an input
protection network for the AD9260 in dc-coupled applications.
A simple R-C network at the output is used to filter out high
frequency noise from the AD8138. Recall, the AD9260’s small
signal bandwidth is 75 MHz. Therefore, any noise falling within
the baseband bandwidth of the AD9260 defined by its sample
and decimation rate, as well as images of its baseband response
occurring at multiples of the sample rate, will degrade its overall
noise performance.
VIN
499
50
+5V
AD9260
VINA
VREF
CS
100pF
0.1
F
10
F
VINB
CS
100pF
499
499
499
50
AD8138
00581-C-063
Figure 63. AD8138 Single-Ended Differential ADC Driver
The second driver circuit, shown in Figure 64, can provide
slightly enhanced noise performance relative to the AD8138,
assuming low noise, high speed op amps are used. This
differential op amp driver circuit is configured to convert and
level-shift a 2 V p-p single-ended, ground-referenced signal to a
4 V p-p differential signal centered at the common-mode level
of the AD9260. The circuit is based on two op amps that are
configured as matched unity gain difference amplifiers. The
single-ended input signal is applied to opposing inputs of the
difference amplifiers, thus providing differential outputs. The
common-mode offset voltage is applied to the noninverting
resistor leg of each difference amplifier providing the required
offset voltage. This offset voltage is derived from the common-
mode level (CML) pin of the AD9260 via a low output
impedance buffer amplifier capable of driving a 1 F capacitive
load. The common-mode offset can be varied over a 1.8 V to
2.5 V span without any serious degradation in distortion
performance as shown in Figure 50, thus providing some
flexibility in improving output compression distortion from
some ±5 op amps with limited positive voltage swing.
To protect the AD9260 from an undervoltage fault condition
from op amps specified for ±5 V operation, two 50 series
resistors and a diode to AGND are inserted between each op
amp output and the AD9260 inputs. The AD9260 will
inherently be protected against any overvoltage condition if the
op amps share the same positive power supply (AVDD) as the
AD9260. Note, the gain accuracy and common-mode rejection
of each difference amplifier in this driver circuit can be
enhanced by using a matched thin-film resistor network
(Ohmtek ORNA5000F) for the op amps. Resistor values should
be 500 or less to maintain the lowest possible noise.
The noise performance of each unity gain differential driver
circuit is limited by its inherent noise gain of two. For unity gain
op amps only, the noise gain can be reduced from two to one
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