參數(shù)資料
型號: AD9253BCPZ-80
廠商: Analog Devices Inc
文件頁數(shù): 23/40頁
文件大?。?/td> 0K
描述: IC ADC 14BIT SRL 80MSPS 48LFCSP
標(biāo)準(zhǔn)包裝: 1
位數(shù): 14
采樣率(每秒): 80M
數(shù)據(jù)接口: LVDS,串行,SPI?
轉(zhuǎn)換器數(shù)目: 4
功率耗散(最大): 405mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-WFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 48-LFCSP-WQ(7x7)
包裝: 托盤
輸入數(shù)目和類型: 4 個差分,雙極
Data Sheet
AD9253
Rev. 0 | Page 3 of 40
SPECIFICATIONS
DC SPECIFICATIONS
AVDD = 1.8 V, DRVDD = 1.8 V, 2 V p-p differential input, 1.0 V internal reference, AIN = 1.0 dBFS, unless otherwise noted.
Table 1.
AD9253-80
AD9253-105
AD9253-125
Parameter1
Temp
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
RESOLUTION
14
Bits
ACCURACY
No Missing Codes
Full
Guaranteed
Offset Error
Full
0.7
0.3
+0.1
0.7
0.3
+0.1
0.7
0.3
+0.1
% FSR
Offset Matching
Full
0.6
+0.2
+0.6
0.6
+0.2
+0.6
0.6
+0.2
+0.6
% FSR
Gain Error
Full
10
5
0
10
5
0
10
5
0
% FSR
Gain Matching
Full
1
1.6
1
1.6
1.1
1.6
% FSR
Differential Nonlinearity (DNL)
Full
1
+1.6
0.8
+1.5
0.8
+1.5
LSB
25°C
±0.8
±0.75
LSB
Integral Nonlinearity (INL)
Full
4.0
+4.0
4.0
+4.0
LSB
25°C
±1.5
±2.0
LSB
TEMPERATURE DRIFT
Offset Error
Full
±2
ppm/°C
INTERNAL VOLTAGE REFERENCE
Output Voltage (1 V Mode)
Full
0.98
1.0
1.02
0.98
1.0
1.02
0.98
1.0
1.02
V
Load Regulation at 1.0 mA (VREF = 1 V)
Full
2
mV
Input Resistance
Full
7.5
INPUT-REFERRED NOISE
VREF = 1.0 V
25°C
0.94
LSB rms
ANALOG INPUTS
Differential Input Voltage (VREF = 1 V)
Full
2
V p-p
Common-Mode Voltage
Full
0.9
V
Differential Input Resistance
5.2
Differential Input Capacitance
Full
3.5
pF
POWER SUPPLY
AVDD
Full
1.7
1.8
1.9
1.7
1.8
1.9
1.7
1.8
1.9
V
DRVDD
Full
1.7
1.8
1.9
1.7
1.8
1.9
1.7
1.8
1.9
V
IAVDD2
Full
131
144
158
172
183
200
mA
IDRVDD (ANSI-644 Mode)2
Full
63
81
67
95
71
100
mA
IDRVDD (Reduced Range Mode)2
25°C
42
48
53
mA
TOTAL POWER CONSUMPTION
DC Input
Full
326
375
423
mW
Sine Wave Input (Four Channels Including
Output Drivers ANSI-644 Mode)
Full
349
405
481
457
540
mW
Sine Wave Input (Four Channels Including
Output Drivers Reduced Range Mode)
25°C
311
371
425
mW
Power-Down
Full
2
mW
Standby3
Full
178
209
236
mW
1 See the AN-835 Application Note, Understanding High Speed ADC Testing and Evaluation, for definitions and for details on how these tests were completed.
2 Measured with a low input frequency, full-scale sine wave on all four channels.
3 Can be controlled via the SPI.
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