參數資料
型號: AD9244BSTZRL-40
廠商: Analog Devices Inc
文件頁數: 35/36頁
文件大小: 0K
描述: IC ADC 14BIT SGL 40MSPS 48LQFP
標準包裝: 2,000
位數: 14
采樣率(每秒): 40M
數據接口: 并聯(lián)
轉換器數目: 1
功率耗散(最大): 300mW
電壓電源: 模擬和數字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-LQFP
供應商設備封裝: 48-LQFP(7x7)
包裝: 帶卷 (TR)
輸入數目和類型: 2 個單端,單極;1 個差分,單極
AD9244
Rev. C | Page 8 of 36
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
48
VR
47
VIN
46
VIN
+
45
CML
44
NIC
43
DCS
42
RE
FT
41
RE
FT
40
RE
FB
39
RE
FB
38
RE
FGND
37
VR
EF
35
DFS
34
AVDD
33
AGND
30
DGND
31
AVDD
32
AGND
36
SENSE
29
DRVDD
28
OTR
27
D13 (MSB)
25
D11
26
D12
2
AGND
3
AVDD
4
AVDD
7
CLK+
6
CLK–
5
AGND
1
AGND
8
NIC
9
OEB
10
D0 (LSB)
12
D2
11
D1
13
D3
14
DGND
15
DRV
DD
16
D4
17
D5
18
D6
19
D7
20
D8
21
D9
22
DGND
23
DRV
DD
24
D1
0
PIN 1
AD9244
TOP VIEW
(Not to Scale)
02404-003
Figure 3. Pin Configuration
Table 7. Pin Function Descriptions
Pin No.
Mnemonic
Description
1, 2, 5, 32, 33
AGND
Analog Ground.
3, 4, 31, 34
AVDD
Analog Supply Voltage.
6, 7
CLK–, CLK+
Differential Clock Inputs.
8, 44
NIC
No Internal Connection.
9
OEB
Digital Output Enable (Active Low).
10
D0 (LSB)
Least Significant Bit, Digital Output.
11 to 13,
16 to 21,
24 to 26
D1 to D3,
D4 to D9,
D10 to D12
Digital Outputs.
14, 22, 30
DGND
Digital Ground.
15, 23, 29
DRVDD
Digital Supply Voltage.
27
D13 (MSB)
Most Significant Bit, Digital Output.
28
OTR
Out-of-Range Indicator (Logic 1 Indicates OTR).
35
DFS
Data Format Select. Connect to AGND for straight binary, AVDD for twos complement.
36
SENSE
Internal Reference Control.
37
VREF
Internal Reference.
38
REFGND
Reference Ground.
39 to 42
REFB, REFT
Internal Reference Decoupling.
43
DCS
50% Duty Cycle Stabilizer. Connect to AVDD to activate 50% duty cycle stabilizer, AGND for
external control of both clock edges.
45
CML
Common-Mode Reference (0.5 × AVDD).
46, 47
VIN+, VIN–
Differential Analog Inputs.
48
VR
Internal Bias Decoupling.
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