參數資料
型號: AD9212
廠商: Analog Devices, Inc.
英文描述: Octal, 10-Bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter
中文描述: 八路,10位,六十五分之四十〇 MSPS的串行LVDS 1.8弗吉尼亞州/ D轉換器
文件頁數: 3/56頁
文件大?。?/td> 1840K
代理商: AD9212
AD9212
SPECIFICATIONS
AVDD = 1.8 V, DRVDD = 1.8 V, 2 V p-p differential input, 1.0 V internal reference, AIN = 0.5 dBFS, unless otherwise noted.
Rev. 0 | Page 3 of 56
Table 1.
Parameter
1
RESOLUTION
ACCURACY
No Missing Codes
Offset Error
Offset Matching
Gain Error
Gain Matching
Differential Nonlinearity (DNL)
Integral Nonlinearity (INL)
TEMPERATURE DRIFT
Offset Error
Gain Error
Reference Voltage (1 V Mode)
REFERENCE
Output Voltage Error (VREF = 1 V)
Load Regulation @ 1.0 mA (VREF = 1 V)
Input Resistance
ANALOG INPUTS
Differential Input Voltage Range (VREF = 1 V)
Common-Mode Voltage
Differential Input Capacitance
Analog Bandwidth, Full Power
POWER SUPPLY
AVDD
DRVDD
IAVDD
IDRVDD
Total Power Dissipation (Including Output Drivers)
Power-Down Dissipation
Standby Dissipation
2
CROSSTALK
CROSSTALK (Overrange Condition)
3
1
See the AN-835 Application Note,
Understanding High Speed ADC Testing and Evaluation
, for a complete set of definitions and how these tests were completed.
2
Can be controlled via SPI.
3
Overrange condition is specific with 6 dB of the full-scale input range.
AD9212-40
Typ
Guaranteed
±1.5
±3
±0.4
±0.3
±0.1
±0.15
±2
±17
±21
±2
3
6
2
AVDD/2
7
325
1.8
1.8
252
49.5
542
3
83
90
90
AD9212-65
Typ
Guaranteed
±1.5
±3
±3.2
±0.4
±0.3
±0.4
±2
±17
±21
±2
3
6
2
AVDD/2
7
325
1.8
1.8
390
54
800
3
95
90
90
Unit
Bits
mV
mV
% FS
% FS
LSB
LSB
ppm/°C
ppm/°C
ppm/°C
mV
mV
V p-p
V
pF
MHz
V
V
mA
mA
mW
mW
mW
dB
dB
Temperature
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Min
10
Max
Min
10
Max
1.7
1.7
±8
±8
±1.2
±0.7
±0.4
±0.5
±30
1.9
1.9
260
53
560
11
1.7
1.7
±8
±8
±4.3
±0.9
±0.65
±1
±30
1.9
1.9
405
58
833
11
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