參數(shù)資料
型號(hào): AD9211-200EBZ
廠商: Analog Devices Inc
文件頁(yè)數(shù): 3/28頁(yè)
文件大小: 0K
描述: BOARD EVAL FOR AD9211-200
標(biāo)準(zhǔn)包裝: 1
ADC 的數(shù)量: 1
位數(shù): 10
采樣率(每秒): 200M
數(shù)據(jù)接口: 串行
輸入范圍: 0.98 ~ 1.5 V
在以下條件下的電源(標(biāo)準(zhǔn)): 437mW @ 1.8V
工作溫度: -40°C ~ 85°C
已用 IC / 零件: AD9211
已供物品: 板,電源
相關(guān)產(chǎn)品: AD9211BCPZ-300-ND - IC ADC 10BIT 300MSPS 56LFCSP
AD9211BCPZ-250-ND - IC ADC 10-BIT 250MSPS 56-LFCSP
AD9211BCPZ-200-ND - IC ADC 10-BIT 200MSPS 56-LFCSP
AD9211
Rev. 0 | Page 11 of 28
DNC = DO NOT CONNECT
PIN 1
INDICATOR
1
D2/D7–
2
D2/D7+
3
D3/D8–
4
D3/D8+
5
(MSB) D4/D9–
6
(MSB) D4/D9+
7
DRVDD
8
DRGND
9
OR–
10
OR+
11
DNC
12
DNC
13
DNC
14
DNC
35 VIN+
36 VIN–
37 AVDD
38 AVDD
39 AVDD
40 CML
41 AVDD
42 AVDD
34 AVDD
33 AVDD
32 AVDD
31 RBIAS
30 AVDD
29 PWDN
15
D
N
C
16
D
N
C
17
D
N
C
19
D
N
C
21
D
N
C
/(
O
R
–)
20
D
N
C
22
D
N
C
/(
O
R
+
)
23
D
R
G
N
D
24
D
R
V
D
25
S
D
IO
/D
C
S
26
S
C
L
K
/D
F
S
27
C
S
B
28
R
E
S
E
T
18
D
N
C
45
C
L
K
46
A
V
D
47
D
R
V
D
48
D
R
G
N
D
49
D
C
O
50
D
C
O
+
51
D
N
C
52
D
N
C
53
D
0/
D
5–
(L
S
B
)
54
D
0/
D
5+
(L
S
B
)
44
C
L
K
+
43
A
V
D
TOP VIEW
(Not to Scale)
PIN 0 (EXPOSED PADDLE) = AGND
AD9211
55
D
1/
D
6–
56
D
1/
D
6+
06
04
1-
00
5
Figure 5. AD9211 Double Data Rate Pin Configuration
Table 8. Double Data Rate Mode Pin Function Descriptions
Pin No.
Mnemonic
Description
30, 32 to 34, 37 to 39,
41 to 43, 46
AVDD
1.8 V Analog Supply.
7, 24, 47
DRVDD
1.8 V Digital Output Supply.
0
AGND1
Analog Ground.
8, 23, 48
Digital Output Ground.
35
VIN+
Analog Input—True.
36
VIN
Analog Input—Complement.
40
CML
Common-Mode Output Pin. Enabled through the SPI, this pin provides a reference for the
optimized internal bias voltage for VIN+/VIN.
44
CLK+
Clock Input—True.
45
CLK
Clock Input—Complement.
31
RBIAS
Set Pin for Chip Bias Current. (Place 1% 10 kΩ resistor terminated to ground.) Nominally 0.5 V.
28
RESET
CMOS-Compatible Chip Reset (Active Low).
25
SDIO/DCS
Serial Port Interface (SPI) Data Input/Output (Serial Port Mode); Duty Cycle Stabilizer Select
(External Pin Mode).
26
SCLK/DFS
Serial Port Interface Clock (Serial Port Mode); Data Format Select Pin (External Pin Mode).
27
CSB
Serial Port Chip Select (Active Low).
29
PWDN
Chip Power-Down.
49
DCO
Data Clock Output—Complement.
50
DCO+
Data Clock Output—True.
53
D0/D5
D1/D7 Complement Output Bit (LSB).
54
D0/D5+
D1/D7 True Output Bit (LSB).
55
D1/D6
D2/D8 Complement Output Bit.
56
D1/D6+
D2/D8 True Output Bit.
1
D2/D7
D3/D9 Complement Output Bit.
2
D2/D7+
D3/D9 True Output Bit.
3
D3/D8
D4/D10 Complement Output Bit.
4
D3/D8+
D4/D10 True Output Bit.
5
D4/D9
D5/D11 Complement Output Bit (MSB).
6
D4/D9+
D5/D11 True Output Bit (MSB).
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