參數(shù)資料
型號: AD9201ARS
廠商: ANALOG DEVICES INC
元件分類: ADC
英文描述: Dual Channel, 20 MHz 10-Bit Resolution CMOS ADC
中文描述: 2-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28
封裝: SSOP-28
文件頁數(shù): 1/20頁
文件大?。?/td> 431K
代理商: AD9201ARS
AD9201
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
Analog Devices, Inc., 1999
REV. D
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
Dual Channel, 20 MHz 10-Bit
Resolution CMOS ADC
FEATURES
Complete Dual Matching ADCs
Low Power Dissipation: 215 mW (+3 V Supply)
Single Supply: 2.7 V to 5.5 V
Differential Nonlinearity Error: 0.4 LSB
On-Chip Analog Input Buffers
On-Chip Reference
Signal-to-Noise Ratio: 57.8 dB
Over Nine Effective Bits
Spurious-Free Dynamic Range: –73 dB
No Missing Codes Guaranteed
28-Lead SSOP
FUNCTIONAL BLOCK DIAGRAM
1V
REFERENCE
BUFFER
QREFB
QREFT
VREF
IREFB
IREFT
REFSENSE
IINA
IINB
"I" ADC
QINB
QINA
"Q" ADC
Q
REGISTER
I
REGISTER
THREE-
STATE
OUTPUT
BUFFER
AVDD
AVSS
CLOCK
DVDD
DVSS
SLEEP
SELECT
DATA
10 BITS
CHIP
SELECT
AD9201
ASYNCHRONOUS
MULTIPLEXER
PRODUCT DESCRIPTION
The AD9201 is a complete dual channel, 20 MSPS, 10-bit
CMOS ADC. The AD9201 is optimized specifically for applica-
tions where close matching between two ADCs is required (e.g.,
I/Q channels in communications applications). The 20 MHz
sampling rate and wide input bandwidth will cover both narrow-
band and spread-spectrum channels. The AD9201 integrates two
10-bit, 20 MSPS ADCs, two input buffer amplifiers, an internal
voltage reference and multiplexed digital output buffers.
Each ADC incorporates a simultaneous sampling sample-and-
hold amplifier at its input. The analog inputs are buffered; no
external input buffer op amp will be required in most applica-
tions. The ADCs are implemented using a multistage pipeline
architecture that offers accurate performance and guarantees no
missing codes. The outputs of the ADCs are ported to a multi-
plexed digital output buffer.
The AD9201 is manufactured on an advanced low cost CMOS
process, operates from a single supply from 2.7 V to 5.5 V, and
consumes 215 mW of power (on 3 V supply). The AD9201 input
structure accepts either single-ended or differential signals,
providing excellent dynamic performance up to and beyond
its 10 MHz Nyquist input frequencies.
PRODUCT HIGHLIGHTS
1. Dual 10-Bit, 20 MSPS ADCs
A pair of high performance 20 MSPS ADCs that are opti-
mized for spurious free dynamic performance are provided for
encoding of I and Q or diversity channel information.
2. Low Power
Complete CMOS Dual ADC function consumes a low
215 mW on a single supply (on 3 V supply). The AD9201
operates on supply voltages from 2.7 V to 5.5 V.
3. On-Chip Voltage Reference
The AD9201 includes an on-chip compensated bandgap
voltage reference pin programmable for 1 V or 2 V.
4. On-chip analog input buffers eliminate the need for external
op amps in most applications.
5. Single 10-Bit Digital Output Bus
The AD9201 ADC outputs are interleaved onto a single
output bus saving board space and digital pin count.
6. Small Package
The AD9201 offers the complete integrated function in a
compact 28-lead SSOP package.
7. Product Family
The AD9201 dual ADC is pin compatible with a dual 8-bit
ADC (AD9281) and has a companion dual DAC product,
the AD9761 dual DAC.
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