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參數(shù)資料
| 型號： | AD9100 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Ultrahigh Speed Monolithic Track-and-Hold(超高速單片跟蹤保持放大器) |
| 中文描述： | 超高速單片采樣保持（超高速單片跟蹤保持放大器） |
| 文件頁數(shù)： | 9/12頁 |
| 文件大小： | 383K |
| 代理商： | AD9100 |
AD9100
REV. B
–9–
In the FFT spectrum below (see Figure 19), the 71.4 MHz IF is
observed at 1.4 MHz. Note that the highest frequency observed
(FS/2) is determined by the sample rate of the T/H.
0
–100
5.0
–80
DC
–40
–60
–20
4.0
3.0
2.0
1.0
FREQUENCY – MHz
7
8
6
8
2
5
3
4
Figure 19. 71.4 MHz Signal Sampled at 10 MSPS with
200 mV p-p Input
Low Noise Applications
When processing low level single event signals in which noise
performance is the primary concern, amplification ahead of the
AD9100 can increase overall system signal to noise ratio. Front-
end amplification often results in an increase in hold mode
distortion levels because of the track mode limitations of the
amplifier which is used. Depending on the signal levels and
bandwidth, the AD9618 low noise high gain amplifier is a pos-
sible candidate for this application. See Figure 20.
As a general rule,
if the goal is maximize SNR (minimize noise),
pre-AD9100 amplification is recommended. When the system
goal is to maximize the spurious free dynamic range (minimize
distortion), post-AD9100 amplification is recommended.
AD9618
LOW
LEVEL
SOURCE
TO
ENCODER
AD9100
Figure 20. Using AD9618 as Pre-Amp for AD9100
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| AD9101AR | 125 MSPS Monolithic Sampling Amplifier |
| AD9101SE | 125 MSPS Monolithic Sampling Amplifier |
| AD9101 | 125 MSPS Monolithic Sampling Amplifier(125MSPS單片采樣放大器) |
| AD9200KST | Complete 10-Bit, 20 MSPS, 80 mW CMOS A/D Converter |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9100AD | 制造商:AD 制造商全稱:Analog Devices 功能描述:Ultrahigh Speed Monolithic Track-and-Hold |
| ad9100ae | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Analog Devices 功能描述: |
| AD9100JD | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Analog Devices 功能描述: |
| AD9100SD | 制造商:AD 制造商全稱:Analog Devices 功能描述:Ultrahigh Speed Monolithic Track-and-Hold |
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