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參數(shù)資料
| 型號： | AD8400AR50 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 數(shù)字電位計(jì) |
| 英文描述： | 32-Tap. Nonvolatile. Linear-Taper Digital Potentiometers in SOT23 |
| 中文描述： | 50K DIGITAL POTENTIOMETER, 3-WIRE SERIAL CONTROL INTERFACE, 256 POSITIONS, PDSO8 |
| 封裝： | MS-012AA, SOIC-8 |
| 文件頁數(shù)： | 4/20頁 |
| 文件大?。?/td> | 496K |
| 代理商： | AD8400AR50 |
1 k
V
VERSION
ELECTRICAL CHARACTERISTICS
Parameter
Symbol
Conditions
Min
Typ
1
Max
Units
DC CHARACTERISTICS RHEOSTAT MODE Specifications Apply to All VRs
Resistor Differential NL
2
Resistor Nonlinearity
2
Nominal Resistance
3
Resistance Tempco
Wiper Resistance
Nominal Resistance Match
DC CHARACTERISTICS POTENTIOMETER DIVIDER Specifications Apply to All VRs
Resolution
N
Integral Nonlinearity
4
INL
Differential Nonlinearity
4
DNL
DNL
Voltage Divider Temperature Coefficent
V
W
/
T
Full-Scale Error
V
WFSE
Zero-Scale Error
V
WZSE
RESISTOR TERMINALS
Voltage Range
5
V
A, B, W
Capacitance
6
Ax, Bx
C
A, B
Capacitance
6
Wx
C
W
Shutdown Supply Current
7
I
DD_SD
Shutdown Wiper Resistance
R
W_SD
DIGITAL INPUTS & OUTPUTS
Input Logic High
V
IH
Input Logic Low
V
IL
Input Logic High
V
IH
Input Logic Low
V
IL
Output Logic High
V
OH
Output Logic Low
V
OL
Input Current
I
IL
Input Capacitance
6
C
IL
POWER SUPPLIES
Power Supply Range
V
DD
Range
Supply Current (CMOS)
I
DD
Supply Current (TTL)
8
I
DD
Power Dissipation (CMOS)
9
P
DISS
Power Supply Sensitivity
PSS
PSS
DYNAMIC CHARACTERISTICS
6, 10
Bandwidth –3 dB
BW_1K
Total Harmonic Distortion
THD
W
V
W
Settling Time
t
S
Resistor Noise Voltage
e
NWB
Crosstalk
11
C
T
NOTES FOR 1 k
VERSION
Typicals represent average readings at +25
°
C and V
= +5 V.
2
Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper
positions. R-DNL measures the relative step change from ideal between successive tap positions. See Figure 30 test circuit.
I
W
= 500
μ
A for V
= +3 V and I
= 4 mA for V
DD
= +5 V for 1 k
version.
3
V
= V
, Wiper (V
) = No Connect.
4
INL and DNL are measured at V
with the RDAC configured as a potentiometer divider similar to a voltage output D/A converter. V
A
= V
DD
and V
B
= 0 V.
DNL Specification limits of
±
1 LSB maximum are Guaranteed Monotonic operating conditions. See Figure 29 test circuit.
5
Resistor terminals A, B, W have no limitations on polarity with respect to each other.
6
Guaranteed by design and not subject to production test. Resistor-terminal capacitance tests are measured with 2.5 V bias on the measured terminal. The remaining
resistor terminals are left open circuit.
7
Measured at the Ax terminals. All Ax terminals are open circuited in shutdown mode.
8
Worst case supply current consumed when input logic level at 2.4 V, standard characteristic of CMOS logic. See Figure 21 for a plot of I
DD
versus logic voltage.
9
P
is calculated from (I
×
V
DD
). CMOS logic level inputs result in minimum power dissipation.
10
All Dynamic Characteristics use V
= +5 V.
11
Measured at a V
W
pin where an adjacent V
W
pin is making a full-scale voltage change.
Specifications subject to change without notice.
R-DNL
R-INL
R
R
AB
/
T
R
W
R/R
O
R
WB
, V
A
= NC
R
WB
, V
A
= NC
T
A
= +25
°
C, Model: AD840XYY1
V
AB
= V
DD
, Wiper = No Connect
I
W
= 1 V/R
AB
CH 1 to 2,
V
AB
= V
DD
, T
A
= +25
°
C
–5
–4
0.8
–1
±
1.5
1.2
700
53
0.75
+3
+4
1.5
LSB
LSB
k
ppm/
°
C
%
100
2
8
–6
–4
–5
Bits
LSB
LSB
LSB
ppm/
°
C
LSB
LSB
±
2
–1.5
–2
25
–12
6
+6
+2
+5
V
DD
= +5 V
V
DD
= +3 V, T
A
= +25
°
C
Code = 80
H
Code = FF
H
Code = 00
H
–20
0
0
10
0
V
DD
V
pF
pF
μ
A
f = 1 MHz, Measured to GND, Code = 80
H
f = 1 MHz, Measured to GND, Code = 80
H
V
A
= V
DD
, V
B
= 0 V,
SHDN
= 0
V
A
= V
DD
, V
B
= 0 V,
SHDN
= 0, V
DD
= +5 V
75
120
0.01
50
5
100
V
DD
= +5 V
V
DD
= +5 V
V
DD
= +3 V
V
DD
= +3 V
R
L
= 1 k
to V
DD
I
OL
= 1.6 mA, V
DD
= +5 V
V
IN
= 0 V or +5 V, V
DD
= +5 V
2.4
V
V
V
V
V
V
μ
A
pF
0.8
2.1
0.6
V
DD
–0.1
0.4
±
1
5
2.7
5.5
5
4
27.5
V
μ
A
mA
μ
W
%/%
%/%
V
IH
= V
DD
or V
IL
= 0 V
V
IH
= 2.4 V or 0.8 V, V
DD
= +5.5 V
V
IH
= V
DD
or V
IL
= 0 V, V
DD
= +5.5 V
V
DD
= +5 V
±
10%
V
DD
= +3 V
±
10%
0.01
0.9
0.0035 0.008
0.05
0.13
R = 1 k
V
A
= 1 V rms + 2 V dc, V
B
= 2 V dc, f = 1 kHz
V
A
= V
DD
, V
B
= 0 V,
±
1% Error Band
R
WB
= 500
, f = 1 kHz,
RS
= 0
V
A
= V
DD
, V
B
= 0 V
5,000
0.015
0.5
3
–65
kHz
%
μ
s
nV/
√
Hz
dB
AD8400/AD8402/AD8403–SPECIFICATIONS
(V
DD
= +3 V
6
10% or + 5 V
6
10%, V
A
= +V
DD
, V
B
= 0 V, –40
8
C
≤
T
A
≤
+85
8
C unless
otherwise noted)
–4–
REV. B
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
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