參數(shù)資料
型號(hào): AD8367ARU-REEL7
廠商: Analog Devices Inc
文件頁(yè)數(shù): 7/24頁(yè)
文件大小: 0K
描述: IC AMP VGA 14TSSOP
標(biāo)準(zhǔn)包裝: 1,000
系列: X-AMP®
放大器類型: 可變?cè)鲆?br>
電路數(shù): 1
-3db帶寬: 500MHz
電流 - 輸入偏壓: 27µA
電流 - 電源: 26mA
電壓 - 電源,單路/雙路(±): 2.7 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 14-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 14-TSSOP
包裝: 帶卷 (TR)
AD8367
Rev. A | Page 15 of 24
VGA OPERATION
The AD8367 is a general-purpose VGA suitable for use in a
wide variety of applications where voltage control of gain is
needed. While having a 500 MHz bandwidth, its use is not
limited to high frequency signal processing. Its accurate,
temperature- and supply-stable linear-in-dB scaling is
valuable wherever it is important to have a more dependable
response to the control voltage than is usually offered by VGAs
of this sort. For example, there is no preclusion to its use in
speech-bandwidth systems.
Figure 33 shows the basic connections. The CHP capacitor at
Pin HPFL can be used to alter the high-pass corner frequency of
the signal path and is associated with the offset control loop that
eliminates the inherent variation in the internal dc balance of the
signal path as the gain is varied (offset ripple). This frequency
should be chosen to be about a decade below the lowest frequency
component of the signal. If made much lower than necessary, the
offset loop is not able to track the variations that occur when there
are rapid changes in VGAIN. The control of offset is important even
when the output is ac-coupled because of the potential reduction of
the upper and lower voltage range at this pin.
However, in many applications these components are
unnecessary because an internal network provides a default
high-pass corner of about 500 kHz. For CHP = 1 nF, the
modified corner is at ~10 kHz; it scales downward with
increasing capacitance. Figure 20 shows representative
response curves for the indicated component values.
02710-033
AD8367
ICOM
1
ICOM 14
ENBL
2
HPFL 13
INPT
3
VPSI 12
MODE
4
VPSO 11
GAIN
5
VOUT 10
DETO
6
DECL 9
ICOM
7
OCOM 8
VGAIN
VOUT
VIN
C5
10nF
C1
1
μF
C4
0.1
μF
CHP
10nF
RHP
100
Ω
R6
4.7
Ω
R5
4.7
Ω
VP
C3
0.1
μF
C2
0.1
μF
Figure 33. Basic Connections for Voltage Controlled Gain Mode
MODULATED GAIN MODE
The AD8367 can be used as a means of modulating the signal
level. Keep in mind, however, that the gain is a nonlinear
(exponential) function of VGAIN; thus, it is not suitable for
normal amplitude-modulation functions. The small signal
bandwidth of the gain interface is ~5 MHz, and the slew rate
is of the order of ±500 dB/μs. During gain slewing from close
to minimum to maximum gain (or vice versa), the internal
interpolation processes in an X-AMP-based VGA rapidly
scan the full range of gain values. The gain and offset ripple
associated with this process can cause transient disturbances
in the output. Therefore, it is inadvisable to use high amplitude
pulse drives with rise and fall times below 200 ns.
AGC OPERATION
The AD8367 can be used as an AGC amplifier, as shown in
Figure 34. For this application, the accurate internal, square-law
detector is employed. The output of this detector is a current
that varies in polarity, depending on whether the rms value of
the output is greater or less than its internally-determined
setpoint of 354 mV rms. This is 1 V p-p for sine-wave signals,
but the peak amplitude for other signals, such as Gaussian
noise, or those carrying complex modulation, is invariably
somewhat greater. However, for all waveforms having a crest
factor of <5, and when using a supply voltage of 4.5 V to 5.5 V,
the rms value is correctly measured and delivered at VOUT.
When using lower supplies, the rms value of VOUT is unaffected
(the setpoint is determined by a band gap reference), but the
peak crest factor capacity is reduced.
The gain pin is connected to the base of a transistor internally
and thus requires only 1 μA of current drive. The output of the
detector is delivered to Pin DETO. The detector can source up
to 60 μA and can sink up to 11 μA. For a sine-wave output
signal, and under conditions where the AGC loop is settled, the
detector output also takes the form of a sine-wave, but at twice
the frequency and having a mean value of 0. If the input to the
amplifier increases, the mean of this current also increases and
charges the external loop filter capacitor, CAGC, toward more
positive voltages. Conversely, a reduction in VOUT below the
setpoint of 354 mV rms causes this voltage to fall toward
ground. The capacitor voltage is the AGC bias; this can be
used as a received signal strength indicator (RSSI) output
and is scaled exactly as VGAIN, that is, 20 mV/dB.
02710-034
AD8367
ICOM
1
ICOM 14
ENBL
2
HPFL 13
INPT
3
VPSI 12
MODE
4
VPSO 11
GAIN
5
VOUT 10
DETO
6
DECL
9
ICOM
7
OCOM 8
VAGC
VOUT
VIN
C5
10nF
CAGC
0.1
μF
C1
1
μF
C4
0.1
μF
CHP
10nF
RHP
100
Ω
R6
4.7
Ω
R5
4.7
Ω
VP
C3
0.1
μF
C2
0.1
μF
Figure 34. Basic Connections for AGC Operation
A valuable feature of using a square law detector is that the
RSSI voltage is a true reflection of signal power and can be
converted to an absolute power measurement for any given
source impedance. The AD8367 can thus be employed as a
true-power meter, or decibel-reading ac voltmeter, as distinct
from its basic amplifier function.
The AGC mode of operation requires that the correct gain
direction is chosen. Specifically, the gain must fall as VAGC
increases to restore the needed balance against the setpoint.
Therefore, the MODE pin must be pulled low. This accurate
leveling function is shown in Figure 35, where the rms output is
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