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參數(shù)資料
| 型號： | AD8345AREZ1 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 調(diào)制器/解調(diào)器 |
| 英文描述： | 140 MHz - 1000 MHz RF/MICROWAVE QUADRAPHASE MODULATOR |
| 封裝： | LEAD FREE, MO-153ABT, TSSOP-16 |
| 文件頁數(shù)： | 6/20頁 |
| 文件大?。?/td> | 1013K |
| 代理商： | AD8345AREZ1 |
AD8345
Rev. B | Page 14 of 20
8
2
1
6
4
5
8
2
1
6
4
5
+5V
10k
Ω
1.5k
Ω
AD8132
PHASE
SPLITTER
VOUT
IBBP
Σ
IBBN
QBBP
QBBN
AD8345
LOIP
LOIN
VPS1 VPS2
0.01
μF
1000pF
0.1
μF10μF
+5V
+
348
Ω
348
Ω
348
Ω
0.1
μF
348
Ω
49.9
Ω
348
Ω
24.9
Ω
348
Ω
AD8132
0.1
μF
10
μF
–5V
10
μF0.1μF
+
COM1 COM2 COM3
–5V
3
0.1
μF
348
Ω
24.9
Ω
348
Ω
49.9
Ω
IIN
QIN
0.1
μF10μF
+
0.01
μF
1000pF
0
0932-
030
Figure 30. Single-Ended 1Q Drive Circuit
Note that this circuit assumes that the single-ended I and Q
signals are ground-referenced. Any differential dc-offsets result
in increased LO leakage at the output of the AD8345.
It is possible to drive the baseband inputs with a single-ended
signal biased to 0.7 V, with the unused inputs being biased to a
dc level of 0.7 V. However, this mode of operation is not recom-
mended because any dc level difference between the bias level
of the drive signal and the dc level on the unused input
(including the effect of temperature drift) results in increased
LO leakage. In addition, the maximum output power is reduced
by 6 dB.
RF OUTPUT
The RF output is designed to drive a 50 Ω load but should be ac
coupled as shown in Figure 28. If the I and Q inputs are driven
in quadrature by 1.2 V p-p signals, then the resulting output
power is approximately 1 dBm (see Figure 3). The RF output
impedance is very close to 50 Ω. As a result, no additional
matching circuitry is required if the output is driving a 50 Ω
load.
APPLICATION WITH TxDAC
Figure 31 shows the AD8345 driven by the AD9761 TxDAC.
(Any of the devices in the Analog Devices’ TxDAC family can
also be used in this application.)
The I and Q DACs generate differential output currents of 0 mA
to 10 mA and 10 mA to 0 mA, respectively. The combination of
140 Ω resistors shunted to ground off each DAC output, along
with 210 Ω resistors shunted between each differential DAC
pair, produces a baseband signal into the AD8345 I and Q
inputs that has a differential peak-to-peak swing of 1.2 V with a
dc common-mode bias of 700 mV.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD8345AREZ-RL7 | 140 MHz - 1000 MHz RF/MICROWAVE QUADRAPHASE MODULATOR |
| AD8345AREZ-REEL7 | 140 MHz - 1000 MHz RF/MICROWAVE QUADRAPHASE MODULATOR |
| AD8346ARUZ-REEL | 800 MHz - 2500 MHz RF/MICROWAVE I/Q MODULATOR |
| AD8346ARUZ-REEL7 | 800 MHz - 2500 MHz RF/MICROWAVE I/Q MODULATOR |
| AD8347ARUZ | 800 MHz - 2700 MHz RF/MICROWAVE QUADRAPHASE DEMODULATOR |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD8345AREZ-REEL | 制造商:Analog Devices 功能描述:Quadrature Mod 80MHz 16-Pin TSSOP EP T/R |
| AD8345AREZ-RL7 | 功能描述:IC MOD QUAD 300-1000MHZ 16TSSOP RoHS:是 類別:RF/IF 和 RFID >> RF 調(diào)制器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 功能:調(diào)制器 LO 頻率:700MHz ~ 2.3GHz RF 頻率:700MHz ~ 2.3GHz P1dB:1dBm 底噪:-148dBm/Hz 輸出功率:-1dBm 電流 - 電源:46mA 電源電壓:2.7 V ~ 3.6 V 測試頻率:1.75GHz 封裝/外殼:28-WFQFN 裸露焊盤 包裝:帶卷 (TR) |
| AD8345-EVAL | 制造商:Analog Devices 功能描述:AD8345 EVALUATION BOARD - Bulk |
| AD8345-EVALZ | 制造商:Analog Devices 功能描述:EVAL KIT FOR 140 MHZ TO 1000 MHZ QUADRATURE MODULATOR - Bulk |
| AD8346 | 制造商:AD 制造商全稱:Analog Devices 功能描述:300 MHz to 1000 MHz Quadrature Modulator |
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