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參數(shù)資料
| 型號(hào)： | AD8321 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Gain Programmable CATV Line Driver(可編程增益CATV線驅(qū)動(dòng)器) |
| 中文描述： | 增益可編程有線電視線路驅(qū)動(dòng)器（可編程增益有線電視線驅(qū)動(dòng)器） |
| 文件頁數(shù)： | 3/9頁 |
| 文件大?。?/td> | 64K |
| 代理商： | AD8321 |
PRELMNARY
DATA
Non-Inverting Input. DC biased to approximately V
CC
/2. Should be ac-coupled with a
0.1
μ
F capacitor.
TECHNCAL
AD8321 Pin Function Description
Pin Function Description
1
SDATA
Serial Data Input. This digital input allows for an 8-bit serial (gain) word to be loaded
into the internal register with the MSB (most significant bit) first.
2
CLK
Clock Input. The clock port controls the serial attenuator data transfer rate to the 8-bit
master-slaveregister. A Logic 0 to 1 transition latches the data bit and a 1 to 0
transfers the data bit to the slave.This requires the input serial data word to be valid at
or before this clock transition.
3
DATEN
Data Enable Low Input. This port controls the 8-bit parallel data latch and shift
register. A Logic 0 to 1 transition transfers the latched data to the attenuator core
(updates the gain) and simultaneously inhibits serial data transfer into the register. A
1 to 0 transition inhibits the data latch (holds the previous gain state) and
simultaneously enables the register for serial data load. During Power-up
DATEN
must be high to reset the data latch
4, 11, 12, 13,
15. 16
GND
5
VOCM
VCC/2 Reference Pin. A dc output reference level that is equal to 1/2 of the supply
voltage (VCC). This port should be externally ac decoupled (0.1
μ
F cap). For external
use of this reference voltage, buffering is required.
6
PD
Power-Down Low Logic Input. A Logic 0 powers down (shuts off) the power amplifier
disabling the output signal and enabling the reverse amplifier. A Logic 1 enables the
output power amplifier and disables the reverse amplifier.
7, 8, 9, 17, 20
VCC
Common Positive External Supply Voltage.
10
VOUT
Output Signal Port. DC biased to approximately VCC/2.
14
BYP
Internal Bypass. This pin must be externally ac decoupled (0.1
μ
F cap).
18
VIN+
19
VIN-
Inverting Input . DC biased to approximately V
/2. Should be ac-coupled with a 0.1uF
capacitor. For single ended operation, this ac-coupling capacitor should be tied to
ground
Rev 7.1 6/26/98 3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
SDATA
CLK
GND
VOCM
PD
VCC
VCC
VOUT
DATEN
VCC
VCC
GND
GND
GND
GND
BYP
GND
VIN+
VIN -
VCC
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD8321_05 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Gain Programmablea CATV Line Driver |
| AD8321AR | 制造商:Analog Devices 功能描述:SP Amp Line Driver Amp Single 20-Pin SOIC W Tube 制造商:Rochester Electronics LLC 功能描述:SOIC MCNS CABLE MODEM LINE DRIVER - Bulk |
| AD8321AR-REEL | 制造商:Analog Devices 功能描述:SP Amp Line Driver Amp Single 20-Pin SOIC W T/R |
| AD8321ARZ | 功能描述:IC LINE DRIVER CATV 3.3V 20SOIC RoHS:是 類別:集成電路 (IC) >> 線性 - 視頻處理 系列:- 產(chǎn)品變化通告:Product Discontinuation 07/Mar/2011 標(biāo)準(zhǔn)包裝:3,000 系列:OMNITUNE™ 類型:調(diào)諧器 應(yīng)用:移動(dòng)電話，手機(jī)，視頻顯示器 安裝類型:表面貼裝 封裝/外殼:65-WFBGA 供應(yīng)商設(shè)備封裝:PG-WFSGA-65 包裝:帶卷 (TR) 其它名稱:SP000365064 |
| AD8321ARZ2 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Gain Programmable CATV Line DRiver |
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