- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄2137 > AD8250ARMZ-RL (Analog Devices Inc)IC AMP INST ICMOS LDRIFT 10MSOP PDF資料下載
參數(shù)資料
| 型號： | AD8250ARMZ-RL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 10/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC AMP INST ICMOS LDRIFT 10MSOP |
| 標準包裝： | 3,000 |
| 系列： | iCMOS® |
| 放大器類型： | 儀表 |
| 電路數(shù)： | 1 |
| 輸出類型： | 推挽式 |
| 轉(zhuǎn)換速率： | 25 V/µs |
| -3db帶寬： | 10MHz |
| 電流 - 輸入偏壓： | 5nA |
| 電壓 - 輸入偏移： | 70µV |
| 電流 - 電源： | 4.1mA |
| 電流 - 輸出 / 通道： | 37mA |
| 電壓 - 電源，單路/雙路(±)： | 10 V ~ 30 V，±5 V ~ 15 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 10-TFSOP，10-MSOP（0.118"，3.00mm 寬） |
| 供應商設備封裝： | 10-MSOP |
| 包裝： | 帶卷 (TR) |
| 配用： | AD8250-EVALZ-ND - BOARD EVALUATION AD8250 |
AD8250
Data Sheet
Rev. C | Page 18 of 24
REFERENCE TERMINAL
The reference terminal, REF, is at one end of a 10 kΩ resistor
(see Figure 47). The instrumentation amplifier output is referenced
to the voltage on the REF terminal; this is useful when the output
signal needs to be offset to voltages other than its local analog
ground. For example, a voltage source can be tied to the REF
pin to level shift the output so that the AD8250 can interface
with a single-supply ADC. The allowable reference voltage
range is a function of the gain, common-mode input, and
supply voltages. The REF pin should not exceed either +VS
or VS by more than 0.5 V.
For best performance, especially in cases where the output is
not measured with respect to the REF terminal, source imped-
ance to the REF terminal should be kept low because parasitic
resistance can adversely affect CMRR and gain accuracy.
INCORRECT
AD8250
VREF
CORRECT
AD8250
OP1177
+
–
VREF
06288-
060
Figure 53. Driving the Reference Pin
COMMON-MODE INPUT VOLTAGE RANGE
The 3-op-amp architecture of the AD8250 applies gain and then
removes the common-mode voltage. Therefore, internal nodes
in the AD8250 experience a combination of both the gained
signal and the common-mode signal. This combined signal can be
limited by the voltage supplies even when the individual input and
output signals are not. Figure 27 and Figure 28 show the allowable
common-mode input voltage ranges for various output voltages,
supply voltages, and gains.
LAYOUT
Grounding
In mixed-signal circuits, low level analog signals need to be
isolated from the noisy digital environment. Designing with the
AD8250 is no exception. Its supply voltages are referenced to an
analog ground. Its digital circuit is referenced to a digital ground.
Although it is convenient to tie both grounds to a single ground
plane, the current traveling through the ground wires and PCB
can cause errors. Therefore, use separate analog and digital ground
planes. Analog and digital ground should meet at only one point:
star ground.
The output voltage of the AD8250 develops with respect to the
potential on the reference terminal. Take care to tie REF to the
appropriate local analog ground or to connect it to a voltage that
is referenced to the local analog ground.
Coupling Noise
To prevent coupling noise onto the AD8250, do the following
guidelines:
Do not run digital lines under the device.
Run the analog ground plane under the AD8250.
Shield fast switching signals with digital ground to avoid
radiating noise to other sections of the board, and never
run them near analog signal paths.
Avoid crossover of digital and analog signals.
Connect digital and analog ground at one point only
(typically under the ADC).
Use the large traces on power supply lines to ensure a low
impedance path. Decoupling is necessary; follow the
guidelines listed in the Power Supply Regulation and
Bypassing section.
Common-Mode Rejection
The AD8250 has high CMRR over frequency, giving it greater
immunity to disturbances, such as line noise and its associated
harmonics, in contrast to typical instrumentation amplifiers
whose CMRR falls off around 200 Hz. Typical instrumentation
amplifiers often need common-mode filters at their inputs to
compensate for this shortcoming. The AD8250 is able to reject
CMRR over a greater frequency range, reducing the need for
input common-mode filtering.
Careful board layout maximizes system performance. To
maintain high CMRR over frequency, lay out the input traces
symmetrically. Ensure that the traces maintain resistive and
capacitive balance; this holds for additional PCB metal layers
under the input pins and traces. Source resistance and capaci-
tance should be placed as close to the inputs as possible. Should a
trace cross the inputs (from another layer), route it perpendicular
to the input traces.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD8251ARMZ-RL | IC AMP INST ICMOS LDRIFT 10MSOP |
| AD8253ARMZ | IC AMP INST ICMOS LDRIFT 10MSOP |
| AD825AR-REEL7 | IC OPAMP JFET GP 26MHZ 8SOIC |
| AD8260ACPZ-WP | IC AMP VGA DIFF LN 310MA 32LFCSP |
| AD8264ACPZ-R7 | IC AMP VGA DIFF QUAD LN 40LFCSP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD8250ARZ | 制造商:AD 制造商全稱:Analog Devices 功能描述:12MHz 20V/us G=1,2,5,10 Programmable Gain iCMOS Instrumentation Amplifier |
| AD8250ARZ-R7 | 制造商:AD 制造商全稱:Analog Devices 功能描述:12MHz 20V/us G=1,2,5,10 Programmable Gain iCMOS Instrumentation Amplifier |
| AD8250ARZ-RL | 制造商:AD 制造商全稱:Analog Devices 功能描述:12MHz 20V/us G=1,2,5,10 Programmable Gain iCMOS Instrumentation Amplifier |
| AD8250-EVAL | 制造商:AD 制造商全稱:Analog Devices 功能描述:12MHz 20V/us G=1,2,5,10 Programmable Gain iCMOS Instrumentation Amplifier |
| AD8250-EVALZ | 功能描述:BOARD EVALUATION AD8250 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 運算放大器 系列:iCMOS® 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:1 系列:- |
發(fā)布緊急采購，3分鐘左右您將得到回復。