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| 型號： | AD8224HBCPZ-WP |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 13/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC AMP INST DUAL PREC LN 16LFCSP |
| 標(biāo)準(zhǔn)包裝： | 64 |
| 放大器類型： | 儀表 |
| 電路數(shù)： | 2 |
| 輸出類型： | 滿擺幅 |
| 轉(zhuǎn)換速率： | 2 V/µs |
| -3db帶寬： | 1.5MHz |
| 電流 - 輸入偏壓： | 10pA |
| 電壓 - 輸入偏移： | 175µV |
| 電流 - 電源： | 750µA |
| 電流 - 輸出 / 通道： | 15mA |
| 電壓 - 電源，單路/雙路(±)： | 4.5 V ~ 36 V，±2.25 V ~ 18 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-VQFN，CSP |
| 供應(yīng)商設(shè)備封裝： | 16-LFCSP（4x4） |
| 包裝： | 托盤 - 晶粒 |
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AD8224
Data Sheet
Rev. C | Page 20 of 28
THEORY OF OPERATION
Q2
Q1
NODE A
NODE B
NODE C
NODE D
VB
C1
C2
A1
A2
–VS
+VS
–VS
J1
+IN
VPINCH
+VS
–VS
J2
–IN
VPINCH
+VS
–VS
RG
+VS
–VS
20kΩ
+VS
–VS
+VS
–VS
REF
OUTPUT
A3
NODE E
NODE F
I
R2
24.7kΩ
R1
24.7kΩ
06286-
057
Figure 55. Simplified Schematic
The AD8224 is a JFET input, monolithic instrumentation amplifier
based on the classic three op amp topology (see Figure 55). Input
Transistor J1 and Input Transistor J2 are biased at a fixed current so
that any input signal forces the output voltages of A1 and A2 to
change accordingly. The input signal creates a current through RG
that flows in R1 and R2 such that the outputs of A1 and A2 provide
the correct, gained signal. Topologically, J1, A1, and R1 and J2, A2,
and R2 can be viewed as precision current feedback amplifiers. The
common-mode voltage and amplified differential signal from
A1 and A2 are applied to a difference amplifier that rejects the
common-mode voltage but amplifies the differential signal. The
difference amplifier employs 20 k laser trimmed resistors that
result in an in-amp with a gain error of less than 0.04%. New trim
techniques were developed to ensure that the CMRR exceeds 86 dB
(G = 1).
Using JFET transistors, the AD8224 offers an extremely high
input impedance, extremely low bias currents of 10 pA maximum,
low offset current of 0.6 pA maximum, and no input bias
current noise. In addition, input offset is less than 175 V
and drift is less than 5 V/°C. Ease of use and robustness were
considered. A common problem for instrumentation amplifiers
is that at high gains, when the input is overdriven, an excessive
milliampere input bias current can result, and the output can
undergo phase reversal.
Overdriving the input at high gains refers to when the input
signal is within the supply voltages but the amplifier cannot
output the gained signal. For example, at a gain of 100, driving
the amplifier with 10 V on ±15 V constitutes overdriving the
inputs because the amplifier cannot output 100 V.
The AD8224 has none of these problems; its input bias current
is limited to less than 10 A, and the output does not phase
reverse under overdrive fault conditions.
The AD8224 has extremely low load induced nonlinearity. All
amplifiers that comprise the AD8224 have rail-to-rail output
capability for enhanced dynamic range. The input of the AD8224
can amplify signals with wide common-mode voltages even slightly
lower than the negative supply rail. The AD8224 operates over a
wide supply voltage range. It can operate from either a single
+4.5 V to +36 V supply or a dual ±2.25 V to ±18 V. The transfer
function of the AD8224 is
G
R
G
kΩ
49.4
1 +
=
Users can easily and accurately set the gain using a single,
standard resistor. Because the input amplifiers employ a current
feedback architecture, the AD8224 gain bandwidth product
increases with gain, resulting in a system that does not experience
as much bandwidth loss as voltage feedback architectures at
higher gains.
GAIN SELECTION
Placing a resistor across the RG terminals sets the gain of the
AD8224. This is calculated by referring to Table 12 or by using
the following gain equation
1
kΩ
49.4
=
G
RG
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