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參數(shù)資料
| 型號： | AD8206YR-REEL7 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 運(yùn)動控制電子 |
| 英文描述： | Single-Supply 42 V System Difference Amplifier |
| 中文描述： | OP-AMP, 4500 uV OFFSET-MAX, PDSO8 |
| 封裝： | MS-012AA, SOIC-8 |
| 文件頁數(shù)： | 8/12頁 |
| 文件大?。?/td> | 260K |
| 代理商： | AD8206YR-REEL7 |
AD8206
Preliminary Technical Data
THEORY OF OPERATION
The AD8206 is a single-supply difference amplifier that uses a
unique architecture to accurately amplify small differential cur-
rent shunt voltages in the presence of rapidly changing common-
mode voltages. It is offered in both packaged and die form.
Rev. PrA | Page 8 of 12
In typical applications, the AD8206 is used to measure current
by amplifying the voltage across a current shunt placed across
the inputs.
The gain of the AD8206 is 20 V/V, with an accuracy of 1.2%.
This accuracy is guaranteed over the operating temperature
range of 40°C to +125°C. The die temperature range is 40°C
to +150°C with a guaranteed gain accuracy of 1.3%.
The input offset is less than 2 mV referred to the input at 25°C,
and 4.5 mV maximum referred to the input over the full operat-
ing temperature range for the packaged part. The die input off-
set is less than 6 mV referred to the input over the die operating
temperature range.
The AD8206 operates with a single supply from 4.5 V to 10 V (ab-
solute maximum = 12.5 V). The supply current is less than 2 mA.
High accuracy trimming of the internal resistors allows the
AD8206 to have a common-mode rejection ratio better than
78 dB from dc to 20 kHz. The common-mode rejection ratio
over the operating temperature is 76 dB for both the die and
packaged part.
The output offset can be adjusted from 0.05 V to 4.8 V (V+ =
5 V) for unipolar and bipolar operation.
The AD8206 consists of two amplifiers (A1 and A2), a resistor
network, small voltage reference, and a bias circuit (not shown),
see Figure 13.
The set of input attenuators preceding A1 consist of R
A
, R
B
, and
R
C
, which reduce the common-mode voltage to match the input
voltage range of A1. The two attenuators form a balanced bridge
network. When the bridge is balanced, the differential voltage
created by a common-mode voltage is 0 V at the inputs of A1.
The input attenuation ratio is 1/16.7. The combined series resis-
tance of R
A
, R
B
, and R
C
is approximately 200 k ± 20%.
By attenuating the voltages at Pin 1 and Pin 8, the A1 amplifier
inputs are held within the power supply range, even if Pin 1 and
Pin 8 exceed the supply or fall below common (ground). A ref-
erence voltage of 250 mV biases the attenuator above ground.
This allows the amplifier to operate in the presence of negative
common-mode voltages.
The input network also attenuates normal (differential) mode
voltages. A1 amplifies the attenuated signal by 26. The input
and output of this amplifier are differential to maximize the ac
common-mode rejection.
A2 converts the differential voltage from A1 into a single-ended
signal and provides further amplification. The gain of this sec-
ond stage is 12.86.
The reference inputs, V
REF
1 and V
REF
2, are tied through resistors
to the positive input of A2, which allows the output offset to be
adjusted anywhere in the output operating range. The gain is
1 V/V from the reference pins to the output when the reference
pins are used in parallel. The gain is 0.5 V/V when they are used
to divide the supply.
The ratios of Resistors R
A
, R
B
, R
C
, R
D
, and R
F
are trimmed to a
high level of precision to allow the common-mode rejection
ratio to exceed 80 dB. This is accomplished by laser trimming
the resistor ratio matching to better than 0.01%.
The total gain of 50 is made up of the input attenuation of
1/16.7 multiplied by the first stage gain of 26 and the second
stage gain of 12.86.
The output stage is Class A with a PNP pull-up transistor and a
300 μA current sink pull-down.
0
AD8206
+IN
–IN
250mV
GND
A1
A2
R
A
R
A
R
B
R
B
R
F
R
F
R
D
R
D
R
E
R
F
R
C
R
C
V
OUT
R
REF
R
REF
V
REF
1
V
REF
2
Figure 13. Simplified Schematic
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