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參數(shù)資料
| 型號： | AD8116JSTZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 8/29頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC VIDEO CROSSPOINT SWIT 128LQFP |
| 產(chǎn)品變化通告： | Mold Change 11/Jul/2012 |
| 標準包裝： | 1 |
| 功能： | 視頻交叉點開關(guān) |
| 電路： | 1 x 16:16 |
| 電壓電源： | 雙電源 |
| 電壓 - 電源，單路/雙路(±)： | ±4.5 V ~ 5.5 V |
| 電流 - 電源： | 75mA |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 128-LQFP |
| 供應商設備封裝： | 128-LQFP（14x14） |
| 包裝： | 托盤 |
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AD8116
–15–
REV. B
From a circuit standpoint, this output crosstalk mechanism
looks like a transformer with a mutual inductance between
the windings that drives a load resistor. For low frequencies,
the magnitude of the crosstalk is given by:
|XT| = 20 log10 (Mxy
× s/R
L)
where Mxy is the mutual inductance of output x to output y and
RL is the load resistance on the measured output. This crosstalk
mechanism can be minimized by keeping the mutual inductance
low and increasing RL. The mutual inductance can be kept low
by increasing the spacing of the conductors and minimizing
their parallel length.
One way to increase the load resistance is to buffer the outputs
with a high input impedance buffer as shown in Figure 27. The
AD8079AR is a dual buffer that can be strapped for a gain of +2
(B grade = +2.2). This offsets the halving of the signal when
driving a standard back-terminated video cable.
The input of the buffer requires a path for bias current. This can
be provided by a 500
to 5 k resistor to ground. This resistor
also serves the purpose of biasing the outputs of the crosspoints
at zero volts when all the outputs are disabled.
In addition, the load resistor actually lowers the crosstalk com-
pared to the conditions of the AD8116 outputs driving a high
impedance (greater than 10 k
) or driving a video load (150 ).
This is because the electric field crosstalk that dominates in the
high impedance case has a phase of –90 degrees, while the mag-
netic field crosstalk that dominates in the video load case has a
phase of +90 degrees. With a 500
to 5 k load, the contribu-
tions from each of these is roughly equal, and there is some
cancellation of crosstalk due to the phase differences.
PCB Layout
Extreme care must be exercised to minimize additional crosstalk
generated by the system circuit board(s). The areas that must be
carefully detailed are grounding, shielding, signal routing and
supply bypassing.
The packaging of the AD8116 is designed to help keep the
crosstalk to a minimum. Each input is separated from each
other’s input by an analog ground pin. All of these AGNDs
should be directly connected to the ground plane of the circuit
board. These ground pins provide shielding, low impedance
return paths and physical separation for the inputs. All of these
help to reduce crosstalk.
Each output is separated from its two neighboring outputs by
analog supply pins of either polarity. Each of these analog sup-
ply pins provides power to the output stages of only the two
adjacent outputs. These supply pins provide shielding, physical
separation and low impedance supply for the channel outputs.
Individual bypassing of each of these supply pins with a
0.01
F chip capacitor directly to the ground plane minimizes
high frequency output crosstalk via the mechanism of sharing
common impedances.
Each output also has an on-chip compensation capacitor that is
individually tied to a package pin via the signals called AGND00
through AGND15. This technique reduces crosstalk by preventing
the currents that flow in these paths from sharing a common
impedance on the IC and in the package pins. These AGNDxx
signals should all be connected directly to the ground plane.
The input and output signals minimize crosstalk if they are
located between ground planes on layers above and below, and
separated by ground in between. Vias should be located as close
to the IC as possible to carry the inputs and outputs to the inner
layer. The only place the input and output signals surface is at
the input termination resistors and the output series back termi-
nation resistors. These signals should also be separated, to the
extent possible, as soon as they emerge from the IC package.
+VS
AD8079AR
–VS
1k
AD8116
OUTXX
OUTYY
AD8116
OUTZZ
OUTWW
–5V
0.1 F
75
0.1 F
10 F
+
+5V
TO OTHER
AD8116 OUTPUTS
G = +2
10 F
+
Figure 9. Buffering Wired OR Outputs with the AD8079
Evaluation Board
A four-layer evaluation board for the AD8116 is available.
This board has been carefully laid out and tested to demonstrate
the specified high speed performance of the device. Figure 10
shows the schematic of the evaluation board. Figure 11 shows
the component side silk-screen. The layouts of the board’s
four layers are given in Figures 12, 13, 14 and 15.
The evaluation board package includes the following:
Fully populated board with BNC-type connectors.
Windows
-based software for controlling the board from a
PC via the printer port.
Custom cable to connect evaluation board to PC.
Disk containing Gerber files of board layout.
Windows is a registered trademark of Microsoft Corporation.
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