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參數(shù)資料
| 型號： | AD8015AR |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | Wideband/Differential Output Transimpedance Amplifier |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PDSO8 |
| 封裝： | PLASTIC, SOIC-8 |
| 文件頁數(shù)： | 4/8頁 |
| 文件大小： | 153K |
| 代理商： | AD8015AR |
REV. A
–4–
AD8015
SONE T OC-3 SE NSIT IVIT Y ANALY SIS
O
C-3 Minimum Bandwidth
= 0.7
×
155
MHz
≈
110
MHz
Total Current Noise
= (
π
/2)
×
26.5
nA
= 42
nA
(
assuming single pole response
)
T o maintain a BER < 1
×
10
–10
(1 error per 10 billion bits):
Minimum current level needs to be
> 13
×
Total Current Noise
= 541
nA
(
peak
)
Assume a typical photodiode current/power conversion ratio
= 0.85
A/W
Sensitivity (minimum power level)
= 541/0.85
nW
= 637
nW (peak)
= –32.0
dBm (peak)
= –35.0
dBm (average)
T he SONET OC-3 specification allows for a minimum power
level of –31 dBm peak, or –34 dBm average. Using the AD8015
provides 1 dB margin.
FDDI SE NSIT IVIT Y ANALY SIS
FDDI Minimum Bandwidth
= 0.7
×
125
MHz
≈
88
MHz
Total Current Noise
=
(
π
/
2
)
×
88 MHz
100 MHz
×
26
.
5 nA
= 39
nA
(
assuming single pole response
)
T o maintain a BER < 2.5
×
10
–10
(1 error per 4 billion bits):
Minimum current level needs to be
> 12.6
×
Total Current Noise
= 492
nA
(
peak
)
Assume a typical photodiode current/power conversion ratio
= 0.85
A/W
Sensitivity (minimum power level)
= 492/0.85
nW
= 579
nW (peak)
= –32.4
dBm (peak)
= –35.4
dBm (average)
T he FDDI specification allows for a minimum power level of
–28 dBm peak, or –31 dBm average. Using the AD8015 pro-
vides 4.4 dB margin.
T HE ORY OF OPE RAT ION
T he simplified schematic is shown in Figure 5. Q1 and Q3 make
up the input stage, with Q3 running at 300
μ
A and Q1 running
at 2.7 mA. Q3 runs essentially as a grounded emitter. A large
capacitor (0.01
μ
F) placed from V
BYP
to the positive supply
shorts out the noise of R17, R21, and Q16. T he first stage of the
amplifier (Q3, R2, Q4, and C1) functions as an integrator, inte-
grating current into the I
IN
pin. T he integrator drives a differen-
tial stage (Q5, Q6, R5, R3, and R4) with gains of +3 and –3.
T he differential stage then drives emitter followers (Q41, Q42,
Q60 and Q61). T he positive output of the differential stage pro-
vides the feedback by driving R
FB
. T he differential outputs are
buffered using Q7 and Q8.
T he bandwidth of the AD8015 is set to within +20% of the
nominal value, 240 MHz, by factory trimming R5 to 60
. T he
following formula describes the AD8015 bandwidth:
Bandwidth
= 1/(2
π
×
C
1
×
R
FB
×
(
R
5 + 2
re
)/
R
4)
where
re
(of Q5 and Q6) = 9
each, constant over temperature,
and R
FB
/R4 = 43.5, constant over temperature.
T he bandwidth equation simplifies, and the bandwidth depends
only on the value of C1:
Bandwidth = 1/(2
π
×
3393
×
C
1).
Q3
INPUT
Q1
I
IN
Q16
R17
635
R1
300
R21
1.8k
V
BYP
R2
3k
+V
S
I10
0.75MA
C1 0.2pF
Q4
Q5
Q56
I1
1.5MA
I2
3MA
R5 60
R3
230
Q41
RFB
Q6
R4
230
Q7
+V
S
Q42
Q8
330
330
–V
S
+OUTPUT
R44 50
Q60
R43 50
I3
1MA
I4
3MA
I5
3MA
I6
1MA
I7
1MA
I8
1MA
I9
1MA
10k
Q61
–OUTPUT
Figure 5. AD8015 Simplified Schematiic
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