參數(shù)資料
型號: AD8007ARZ-RL
廠商: Analog Devices Inc
文件頁數(shù): 9/21頁
文件大小: 0K
描述: IC OPAMP CF ULDIST LN LP 8SOIC
標(biāo)準(zhǔn)包裝: 2,500
放大器類型: 電流反饋
電路數(shù): 1
轉(zhuǎn)換速率: 1000 V/µs
-3db帶寬: 650MHz
電流 - 輸入偏壓: 4µA
電壓 - 輸入偏移: 500µV
電流 - 電源: 9mA
電流 - 輸出 / 通道: 130mA
電壓 - 電源,單路/雙路(±): 5 V ~ 12 V,±2.5 V ~ 6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SO
包裝: 帶卷 (TR)
AD8007/AD8008
Rev. E | Page 16 of
20
Whenever physical layout considerations prevent the decoupling
scheme shown in Figure 53, the user can connect one of the
high frequency decoupling capacitors directly across the supplies
and connect the other high frequency decoupling capacitor to
ground (see Figure 54).
+VS
–VS
RG
499
RS
200
IN
RF
499
OUT
AD8007
+
10F
C1
0.1F
C2
0.1F
02
86
6-
0
54
Figure 54. High Frequency Capacitors Connected Across the Supplies
(Recommended)
LAYOUT CONSIDERATIONS
The standard noninverting configuration with recommended
power supply bypassing is shown in Figure 54. The 0.1 μF high
frequency decoupling capacitors should be X7R or NPO chip
components. Connect C2 from the +VS pin to the VS pin.
Connect C1 from the +VS pin to signal ground.
The length of the high frequency bypass capacitor leads is critical.
Parasitic inductance due to long leads works against the low
impedance created by the bypass capacitor. The ground for the
load impedance should be at the same physical location as the
bypass capacitor grounds. For larger value capacitors, which are
intended to be effective at lower frequencies, the current return
path distance is less critical.
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