
REV. C
AD8002
–10–
THEORY OF OPERATION
A very simple analysis can put the operation of the AD8002, a
current feedback amplifier, in familiar terms. Being a current
feedback amplifier, the AD8002’s open-loop behavior is ex-
pressed as transimpedance,
V
O
/
I
–IN
, or T
Z
. The open-loop
transimpedance behaves just as the open-loop voltage gain of a
voltage feedback amplifier, that is, it has a large dc value and
decreases at roughly 6 dB/octave in frequency.
Since the R
IN
is proportional to 1/g
M
, the equivalent voltage
gain is just T
Z
×
g
M
, where the g
M
in question is the trans-
conductance of the input stage. This results in a low open-loop
input impedance at the inverting input, a now familiar result.
Using this amplifier as a follower with gain, Figure 40, basic
analysis yields the following result.
V
V
G
T
S
×
T
G
R
R
G
R
R
R
g
O
IN
Z
Z
IN
IN
M
=
×
+
+
=
+
=
≈
( )
(S
/
1
1
1
2
1
50
V
OUT
R1
R2
R
IN
V
IN
Figure 40.
Recognizing that G
×
R
IN
<< R1 for low gains, it can be seen to
the first order that bandwidth for this amplifier is independent
of gain (G).
Considering that additional poles contribute excess phase at
high frequencies, there is a minimum feedback resistance below
which peaking or oscillation may result. This fact is used to
determine the optimum feedback resistance, R
F
. In practice
parasitic capacitance at the inverting input terminal will also add
phase in the feedback loop, so picking an optimum value for R
F
can be difficult.
Achieving and maintaining gain flatness of better than 0.1 dB at
frequencies above 10 MHz requires careful consideration of
several issues.
Choice of Feedback and Gain Resistors
The fine scale gain flatness will, to some extent, vary with feed-
back resistance. It, therefore, is recommended that once opti-
mum resistor values have been determined, 1% tolerance values
should be used if it is desired to maintain flatness over a wide
range of production lots. In addition, resistors of different con-
struction have different associated parasitic capacitance and
inductance. Surface mount resistors were used for the bulk of
the characterization for this data sheet. It is not recommended
that leaded components be used with the AD8002.
Printed Circuit Board Layout Considerations
As to be expected for a wideband amplifier, PC board parasitics
can affect the overall closed-loop performance. Of concern are
stray capacitances at the output and the inverting input nodes. If
a ground plane is to be used on the same side of the board as
the signal traces, a space (5 mm min) should be left around the
signal lines to minimize coupling. Additionally, signal lines
connecting the feedback and gain resistors should be short
enough so that their associated inductance does not cause high
frequency gain errors. Line lengths on the order of less than 5
mm are recommended. If long runs of coaxial cable are being
driven, dispersion and loss must be considered.
Power Supply Bypassing
Adequate power supply bypassing can be critical when optimiz-
ing the performance of a high frequency circuit. Inductance in
the power supply leads can form resonant circuits that produce
peaking in the amplifier’s response. In addition, if large current
transients must be delivered to the load, then bypass capacitors
(typically greater than 1
μ
F) will be required to provide the best
settling time and lowest distortion. A parallel combination of
4.7
μ
F and 0.1
μ
F is recommended. Some brands of electrolytic
capacitors will require a small series damping resistor
≈
4.7
for
optimum results.
DC Errors and Noise
There are three major noise and offset terms to consider in a
current feedback amplifier. For offset errors refer to the equa-
tion below. For noise error the terms are root-sum-squared to
give a net output error. In the circuit below (Figure 41) they are
input offset (V
IO
) which appears at the output multiplied by the
noise gain of the circuit (1 + R
F
/R
I
), noninverting input current
(I
BN
×
R
N
) also multiplied by the noise gain, and the inverting
input current, which when divided between R
F
and R
I
and sub-
sequently multiplied by the noise gain always appears at the
output as I
BN
×
R
F
. The input voltage noise of the AD8002 is a
low 2 nV/
√
Hz
. At low gains though the inverting input current
noise times R
F
is the dominant noise source. Careful layout and
device matching contribute to better offset and drift specifica-
tions for the AD8002 compared to many other current feedback
amplifiers. The typical performance curves in conjunction with
the equations below can be used to predict the performance of
the AD8002 in any application.
V
V
R
R
I
R
R
R
I
R
OUT
IO
F
I
BN
N
F
I
BI
F
=
×
+
±
×
×
+
±
×
1
1
R
F
R
I
R
N
I
BN
V
OUT
I
BI
Figure 41. Output Offset Voltage