參數(shù)資料
型號: AD7988-5BCPZ-RL7
廠商: Analog Devices Inc
文件頁數(shù): 8/24頁
文件大?。?/td> 0K
描述: IC ADC 16BIT SRL 500KSPS 10LFCSP
標準包裝: 1,500
系列: PulSAR®
位數(shù): 16
采樣率(每秒): 500k
數(shù)據(jù)接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 單電源
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 10-WFDFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 10-LFCSP-WD(3x3)
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 1 個偽差分,單極
AD7988-1/AD7988-5
Data Sheet
Rev. D | Page 16 of 24
ANALOG INPUTS
Figure 32 shows an equivalent circuit of the input structure of
The two diodes, D1 and D2, provide ESD protection for the
analog inputs, IN+ and IN. Care must be taken to ensure that
the analog input signal never exceeds the supply rails by more
than 0.3 V, because this causes these diodes to become forward-
biased and start conducting current. These diodes can handle a
forward-biased current of 130 mA maximum. For instance,
these conditions may eventually occur when the input buffer’s
supplies are different from VDD. In such a case (for example, an
input buffer with a short circuit), the current limitation can be
used to protect the part.
REF
RIN
CIN
IN+
OR IN–
GND
D2
CPIN
D1
10231-
033
Figure 32. Equivalent Analog Input Circuit
The analog input structure allows the sampling of the true
differential signal between IN+ and IN. By using these
differential inputs, signals common to both inputs are rejected.
During the acquisition phase, the impedance of the analog
inputs (IN+ and IN) can be modeled as a parallel combination of
Capacitor CPIN and the network formed by the series connection of
RIN and CIN. CPIN is primarily the pin capacitance. RIN is typically
400 and is a lumped component made up of serial resistors
and the on resistance of the switches. CIN is typically 30 pF and
is mainly the ADC sampling capacitor. During the conversion
phase, when the switches are opened, the input impedance is
limited to CPIN. RIN and CIN make a one-pole, low-pass filter that
reduces undesirable aliasing effects and limits the noise.
When the source impedance of the driving circuit is low, the
AD7988-x can be driven directly. Large source impedances
significantly affect the ac performance, especially THD. The dc
performances are less sensitive to the input impedance. The
maximum source impedance depends on the amount of THD
that can be tolerated. The THD degrades as a function of the
source impedance and the maximum input frequency.
DRIVER AMPLIFIER CHOICE
Although the AD7988-x is easy to drive, the driver amplifier
needs to meet the following requirements:
The noise generated by the driver amplifier must be kept as
low as possible to preserve the SNR and transition noise
performance of the AD7988-x. The noise coming from the
driver is filtered by the AD7988-x analog input circuit’s
one-pole, low-pass filter made by RIN and CIN or by the
external filter, if one is used. Because the typical noise of
the AD7988-x is 47.3 V rms, the SNR degradation due to
the amplifier is
+
=
2
3dB
2
)
(
2
π
47.3
log
20
N
LOSS
Ne
f
SNR
where:
f–3dB is the input bandwidth in MHz of the AD7988-x
(10 MHz) or the cutoff frequency of the input filter, if
one is used.
N is the noise gain of the amplifier (for example, 1 in buffer
configuration).
eN is the equivalent input noise voltage of the op amp,
in nV/√Hz.
For ac applications, the driver should have a THD
performance commensurate with the AD7988-x.
For multichannel multiplexed applications, the driver ampli-
fier and the AD7988-x analog input circuit must settle for
a full-scale step onto the capacitor array at a 16-bit level
(0.0015%, 15 ppm). In the amplifier data sheet, settling at
0.1% to 0.01% is more commonly specified. This may
differ significantly from the settling time at a 16-bit level
and should be verified prior to driver selection.
Table 8. Recommended Driver Amplifiers
Amplifier
Typical Application
Very low noise, small size, and low power
Very low noise and high frequency
Low noise and high frequency
Low power, low noise, and low frequency
5 V single-supply, low noise
5 V single-supply, low power
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