參數(shù)資料
型號(hào)： AD7937
廠(chǎng)商： Analog Devices, Inc.
英文描述： LC2MOS 8+4 Loading Dual 12-Bit DAC
中文描述： LC2MOS 8 4載入中雙12位DAC
文件頁(yè)數(shù)： 5/8頁(yè)
文件大?。?/td> 157K
代理商： AD7937
AD7937
–5–
REV. 0
UNIPOLAR BINARY OPERATION
(2-QUADRANT MULTIPLICATION)
Figure 4 shows the circuit diagram for unipolar binary operation.
With an ac input, the circuit performs 2-quadrant multiplication.
The code table for Figure 4 is given in Table II.
Operational amplifiers A1 and A2 can be in a single package
(AD644, AD712) or separate packages (AD544, AD711,
AD OP27). Capacitors C1 and C2 provide phase compensation
to help prevent overshoot and ringing when high-speed op amps
are used.
For zero offset adjustment, the appropriate DAC register is loaded
with all 0s and amplifier offset adjusted so that V
OUTA
or V
OUTB
is 0 V. Full-scale trimming is accomplished by loading the DAC
register with all 1s and adjusting R1 (R3) so that V
OUTA
(V
OUTB
)
= –V
IN
(4095/4096). For high temperature operation, resistors
and potentiometers should have a low Temperature Coefficient.
In many applications, because of the excellent Gain T.C. and Gain
Error specifications of the AD7937, Gain Error trimming is not
necessary. In fixed reference applications, full scale can also be
adjusted by omitting R1, R2, R3, R4 and trimming the reference
voltage magnitude.
I
OUTA
AGNDA
DAC A
R
FBA
C1
R2
47
A1
R1
V
DD
V
INA
I
OUTB
AGNDB
R
FBB
C2
R4
47
A2
1/2
AD712
1/2
AD712
V
OUTA
V
OUTB
DAC B
V
INB
R3
DGND
DATA
INPUT
AD7937
*
DB7
DB0
CONTROL CIRCUITRY
OMITTED FOR CLARITY
*
Figure 4. Unipolar Binary Operation
Table II. Unipolar Binary Code Table for
Circuit of Figure 4
Binary Number in
DAC Register
MSB
Analog Output,
V
OUTA
or V
OUTB
LSB
1111 1111 1111
V
IN
4095
4096
1000 0000 0000
V
IN
2048
4096
=
12
V
IN
0000 0000 0001
0
V
V
IN
1
4096
0000 0000 0000
BIPOLAR OPERATION
(4-QUADRANT MULTIPLICATION)
The recommended circuit diagram for bipolar operation is shown
in Figure 5. Offset binary coding is used.
With the appropriate DAC register loaded to 1000 0000 0000,
adjust R1 (R3) so that V
OUTA
(V
OUTB
) = 0 V. Alternatively, R1,
R2 (R3, R4) may be omitted and the ratios of R6, R7 (R9, R10)
varied for V
OUTA
(V
OUTB
) = 0 V. Full-scale trimming can be
accomplished by adjusting the amplitude of V
IN
or by varying the
value of R5 (R8).
If R1, R2 (R3, R4) are not used, then resistors R5, R6, R7 (R8,
R9, R10) should be ratio matched to 0.01% to ensure gain error
performance to the data sheet specification. When operating over a
wide temperature range, it is important that the resistors be of
the same type so that their temperature coefficients match.
The code table for Figure 5 is given in Table III.
I
OUTA
AGNDA
DAC A
R
FBA
C1
R2
47
A1
R1
V
DD
V
INA
I
OUTB
AGNDB
R
FBB
C2
R4
47
A3
V
OUTA
DAC B
V
INB
R3
DGND
DATA
INPUT
AD7937
*
DB7
DB0
CONTROL CIRCUITRY
OMITTED FOR CLARITY
*
R6
20k
R7
10k
R5
20k
R10
A2
1/2
AD712
V
OUTB
R8
20k
A4
R9
10k
1/2
AD712
1/2
AD712
1/2
AD712
Figure 5. Bipolar Operation (Offset Binary Coding)
Table III. Bipolar Code Table for Offset Binary
Circuit of Figure 5
Binary Number in
DAC Register
MSB LSB
Analog Output,
V
OUTA
or V
OUTB
1111 1111 1111
+
V
IN
2047
2048
1000 0000 0001
0
V
+
V
IN
1
2048
1000 0000 0000
0111 1111 1111
V
IN
1
2048
0000 0000 0000
V
IN
2048
2048
=
V
IN
相關(guān)PDF資料
PDF描述
AD7937AR LC2MOS 8+4 Loading Dual 12-Bit DAC
AD7937BR LC2MOS 8+4 Loading Dual 12-Bit DAC
AD7938 8-Channel, 1.5 MSPS, 12-Bit and 10-Bit Parallel ADCs with a Sequencer
AD7938BCP 8-Channel, 1.5 MSPS, 12-Bit and 10-Bit Parallel ADCs with a Sequencer
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參數(shù)描述
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AD7937AR-REEL7 制造商:Analog Devices 功能描述:DAC 2CH R-2R 12-BIT 24SOIC W - Tape and Reel
AD7937BR 功能描述:IC DAC 12BIT DUAL 8+4 24-SOIC RoHS:否 類(lèi)別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:2,400 系列:- 設(shè)置時(shí)間:- 位數(shù):18 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:3 電壓電源:模擬和數(shù)字 功率耗散（最大）:- 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:36-TFBGA 供應(yīng)商設(shè)備封裝:36-TFBGA 包裝:帶卷 (TR) 輸出數(shù)目和類(lèi)型:* 采樣率（每秒）:*
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