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參數(shù)資料
| 型號： | AD7934BRU-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 7/32頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 12BIT 4CH 1.5MSPS 28TSSOP |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 1.5M |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 13.5mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 28-TSSOP |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 4 個單端，單極；2 個差分，單極；2 個偽差分，單極 |
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AD7933/AD7934
Rev. B | Page 15 of 32
CONTROL REGISTER
The control register on the AD7933/AD7934 is a 12-bit, write-
only register. Data is written to this register using the CS and
WR pins. The functions of the control register bits are described
in Table 8. At power-up, the default bit settings in the control
register are all 0s. When writing to the control register between
conversions, ensure that CONVST returns high before
performing the write.
Table 7. Control Register Bits
MSB
LSB
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
PM1
PM0
CODING
REF
ZERO
ADD1
ADD0
MODE1
MODE0
SEQ1
SEQ0
RANGE
Table 8. Control Register Bit Function Description
Bit No.
Mnemonic
Description
11, 10
PM1, PM0
Power Management Bits. Use these two bits to select the power mode of operation. The user can choose between
normal mode or various power-down modes of operation as shown in Table 9.
9
CODING
This bit selects the output coding of the conversion result. If the CODING bit is set to 0, the output coding is
straight (natural) binary. If the CODING bit is set to 1, the output coding is twos complement.
8
REF
This bit selects whether the internal or external reference is used to perform the conversion. If the REF bit is
Logic 0, an external reference should be applied to the VREF pin, and if it is Logic 1, the internal reference is
selected. See the Reference section.
7
ZERO
This bit is not used; therefore, it should always be set to Logic 0.
6, 5
ADD1,
ADD0
Use these two address bits to select which analog input channel is to be converted in the next conversion, if the
sequencer is not being used, or to select the final channel in a consecutive sequence when the sequencer is being
used (see Table 11 for more information). The selected input channel is decoded as shown in Table 10.
4, 3
MODE1,
MODE0
The two mode pins select the type of analog input on the four VIN pins. The AD7933/AD7934 have either four
single-ended inputs, two fully differential inputs, or two pseudo differential inputs (see Table 10).
2
SEQ1
The SEQ1 bit in the control register is used in conjunction with the SEQ0 bit to control the sequencer function
(see Table 11).
1
SEQ0
The SEQ0 bit in the control register is used in conjunction with the SEQ1 bit to control the sequencer function
(see Table 11).
0
RANGE
This bit selects the analog input range of the AD7933/AD7934. If RANGE is set to 0, the analog input range
extends from 0 V to VREF. If RANGE is set to 1, the analog input range extends from 0 V to 2 × VREF. When this range
is selected, VDD must be 4.75 V to 5.25 V if a 2.5 V reference is used; otherwise, care must be taken to ensure that
the analog input remains within the supply rails. See the Analog Inputs section for more information.
Table 9. Power Mode Selection Using the Power Management Bits in the Control Register
PM1
PM0
Mode
Description
0
Normal Mode
When operating in normal mode, all circuitry is fully powered up at all times.
0
1
Autoshutdown
When operating in autoshutdown mode, the AD7933/AD7934 enters full shutdown mode at the end of
each conversion. In this mode, all circuitry is powered down.
1
0
Autostandby
When the AD7933/AD7934 enters this mode, the reference remains fully powered, the reference buffer is
partially powered down, and all other circuitry is fully powered down. This mode is similar to
autoshutdown mode, but it allows the part to power up in 7 μs (or 600 ns if an external reference is used).
See the Power Modes of Operation section for more information.
1
Full Shutdown
When the AD7933/AD7934 enters this mode, all circuitry is powered down. The information in the control
register is retained.
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