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參數(shù)資料
| 型號： | AD7927BRU |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 6/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 12BIT 8CH 200KSPS 20TSSOP |
| 標(biāo)準(zhǔn)包裝： | 75 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 200k |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 7.5mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 20-TSSOP |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 8 個單端，單極 |
| 配用： | EVAL-AD7927CBZ-ND - BOARD EVALUATION FOR AD7927 |
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AD7927
Data Sheet
Rev. D | Page 14 of 28
SHADOW REGISTER
Table 10. Shadow Register Bit Functions
MSB
LSB
VIN0
VIN1
VIN2
VIN3
VIN4
VIN5
VIN6
VIN7
VIN0
VIN1
VIN2
VIN3
VIN4
VIN5
VIN6
VIN7
--------------------------------SEQUENCE ONE--------------------------------
--------------------------------SEQUENCE TWO--------------------------------
The shadow register on the AD7927 is a 16-bit, write-only register.
Data is loaded from the DIN pin of the AD7927 on the falling
edge of SCLK. The data is transferred on the DIN line at the
same time that a conversion result is read from the part. This
requires 16 serial clock falling edges for the data transfer. The
information is clocked into the shadow register, provided that
the SEQ and SHADOW bits were set to 0, 1, respectively, in the
previous write to the control register. MSB denotes the first bit
in the data stream. Each bit represents an analog input from
Channel 0 to Channel 7. Through programming the shadow
register, two sequences of channels may be selected, through
which the AD7927 cycles with each consecutive conversion
after the write to the shadow register. Sequence One is per-
formed first and then Sequence Two. If the user does not
wish to perform a second sequence option, then all 0s must be
written to the last eight LSBs of the shadow register. To select a
sequence of channels, the associated channel bit must be set for
each analog input. The AD7927 continuously cycles through
the selected channels in ascending order, beginning with the
lowest channel, until a write operation occurs (that is, the WRITE
bit is set to 1) with the SEQ and SHADOW bits configured in
any way except 1, 0 (see Table 9). The bit functions are outlined
CS
DOUT: CONVERSION RESULT FROM
PREVIOUSLY SELECTED CHANNEL
A2 TO CHANNEL A0.
DIN: WRITE TO CONTROL REGISTER,
WRITE BIT = 1,
SELECT CODING, RANGE, AND POWER MODE.
SELECT CHANNEL A2 TO CHANNEL A0
FOR CONVERSION.
SEQ = SHADOW = 0
WRITE BIT = 1,
SEQ = SHADOW = 0
DUMMY CONVERSION
DIN = ALL 1s
03088-
011
DIN: WRITE TO CONTROL REGISTER,
WRITE BIT = 1,
SELECT CODING, RANGE, AND POWER MODE.
SELECT CHANNEL A2 TO CHANNEL A0
FOR CONVERSION.
SEQ = SHADOW = 0
POWER-ON
Figure 11. SEQ Bit = 0, SHADOW Bit = 0 Flowchart
Figure 11 reflects the traditional operation of a multichannel
ADC, where each serial transfer selects the next channel for
conversion. In this mode of operation, the sequencer function
is not used.
Figure 12 shows how to program the AD7927 to continuously
convert on a particular sequence of channels. To exit this mode
of operation and revert back to the traditional mode of opera-
tion of a multichannel ADC (as outlined in Figure 11), ensure
that the WRITE bit = 1 and the SEQ = SHADOW = 0 on the
next serial transfer. Figure 13 shows how a sequence of consecu-
tive channels can be converted on without having to program
the shadow register or write to the part on each serial transfer.
Again, to exit this mode of operation and revert back to the
traditional mode of operation of a multichannel ADC (as
outlined in Figure 11), ensure the WRITE bit = 1 and the
SEQ = SHADOW = 0 on the next serial transfer.
WRITE BIT = 0
WRITE BIT = 1,
SEQ = 1 SHADOW = 0
03
08
8-
0
12
WRITE BIT = 0
CONTINUOUSLY
CONVERTS ON THE
SELECTED
SEQUENCE OF
CHANNELS BUT
ALLOWS RANGE,
CODING, AND SO ON,
TO CHANGE IN THE
CONTROL REGISTER
WITHOUT INTERRUPT-
ING THE SEQUENCE,
PROVIDED SEQ = 1,
SHADOW = 0
WRITE BIT = 1,
SEQ = 1,
SHADOW = 0
CONTINUOUSLY
CONVERTS ON THE
SELECTED
SEQUENCE OF
CHANNELS
DOUT: CONVERSION RESULT FROM PREVIOUSLY
SELECTED CHANNEL A2 TO CHANNEL A0.
DIN: WRITE TO SHADOW REGISTER, SELECTING
WHICH CHANNELS TO CONVERT ON; CHANNELS
SELECTED NEED NOT BE CONSECUTIVE CHANNELS
DIN: WRITE TO CONTROL REGISTER,
WRITE BIT = 1,
SELECT CODING, RANGE, AND POWER MODE.
SELECT CHANNEL A2 TO CHANNEL A0
FOR CONVERSION.
SEQ = 0, SHADOW = 1
DUMMY CONVERSION
DIN = ALL 1s
CS
POWER-ON
Figure 12. SEQ and SHADOW Conversion Flowchart to Continuously Convert
a Sequence of Channels
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