t6 t2 CS RD DATA BUSY CONVST HI-Z" />
參數(shù)資料
型號(hào): AD7884BQ
廠(chǎng)商: Analog Devices Inc
文件頁(yè)數(shù): 11/16頁(yè)
文件大?。?/td> 0K
描述: IC ADC 16BIT SAMPLING HS 40-CDIP
產(chǎn)品變化通告: Product Discontinuance 27/Oct/2011
標(biāo)準(zhǔn)包裝: 1
位數(shù): 16
采樣率(每秒): 166k
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 2
功率耗散(最大): 325mW
電壓電源: 雙 ±
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 通孔
封裝/外殼: 40-CDIP(0.600",15.24mm)
供應(yīng)商設(shè)備封裝: 40-Cerdip
包裝: 管件
輸入數(shù)目和類(lèi)型: 1 個(gè)差分,雙極
REV. E
AD7884/AD7885
–4–
t6
t2
CS
RD
DATA
BUSY
CONVST
HI-Z
t3
t1
t5
t7
tCONVERT
t4
HI-Z
DATA
VALID
Figure 2. AD7884 Timing Diagram, Using
CS and RD
DATA
OLD DATA VALID
NEW DATA VALID
BUSY
CONVST
t1
t2
t8
tCONVERT
Figure 3. AD7884 Timing Diagram, with
CS and RD
Permanently Low
HBEN
CS
RD
DATA
BUSY
CONVST
HI-Z
DB0–DB7
DB8–DB15
HI-Z
t2
DATA
VALID
t1
DATA
VALID
t9
t10
t3
t5
t6
t7
t4
tCONVERT
Figure 4. AD7885 Timing Diagram, Using
CS and RD
DATA
BUSY
HBEN
CONVST
t1
t11
t12
t2
t8
t13
t14
tCONVERT
OLD DATA VALID
(DB8–DB15)
NEW DATA VALID
(DB8–DB15)
NEW DATA VALID
(DB0–DB7)
NEW DATA VALID
(DB8–DB15)
NEW DATA VALID
(DB0–DB7)
Figure 5. AD7885 Timing Diagram, with
CS and RD Permanently Low
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