(VDD = +5 V 5%, V
參數(shù)資料
型號(hào)： AD7878LPZ-REEL
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 9/16頁(yè)
文件大?。?/td> 0K
描述： IC ADC 12BIT W/DSP 28PLCC
標(biāo)準(zhǔn)包裝： 750
位數(shù)： 12
采樣率（每秒）： 100k
數(shù)據(jù)接口： DSP
轉(zhuǎn)換器數(shù)目： 1
功率耗散（最大）： 95.5mW
電壓電源： 模擬和數(shù)字，雙 ±
工作溫度： 0°C ~ 70°C
安裝類型： 表面貼裝
封裝/外殼： 28-LCC（J 形引線）
供應(yīng)商設(shè)備封裝： 28-PLCC（11.51x11.51）
包裝： 帶卷 (TR)
輸入數(shù)目和類型： 1 個(gè)單端，雙極
AD7878–SPECIFICATIONS
–2–
REV. A
(VDD = +5 V
5%, VCC = +5 V
5%, VSS = –5 V
5%, AGND = DGND =
0 V, fCLK = 8 MHz. All Specifications TMIN to TMAX, unless otherwise noted.)
J, A
K, L, B
S
Parameter
Versions
1
Versions Version
Units
Test Conditions/Comments
DYNAMIC PERFORMANCE
2
Signal-to-Noise Ratio (SNR)
3 @ 25
°C
70
72
70
dB min
VIN = 10 kHz Sine Wave, fSAMPLE = 100 kHz
TMIN to TMAX
70
71
70
dB min
Typically 71.5 dB for 0 < VIN < 50 kHz
Total Harmonic Distortion (THD)
–80
–78
dB max
VIN = 10 kHz Sine Wave, fSAMPLE = 100 kHz
Typically –86 dB for 0 < VIN < 50 kHz
Peak Harmonic or Spurious Noise
–80
–78
dB max
VIN = 10 kHz, fSAMPLE = 100 kHz
Typically –86 dB for 0 < VIN < 50 kHz
Intermodulation Distortion (IMD)
Second Order Terms
–80
–78
dB max
fa = 9 kHz, fb = 9.5 kHz, fSAMPLE = 50 kHz
Third Order Terms
–80
–78
dB max
fa = 9 kHz, fb = 9.5 kHz, fSAMPLE = 50 kHz
Track/Hold Acquisition Time
2
s max
See Throughput Rate Section
DC ACCURACY
Resolution
12
Bits
Minimum Resolution for Which
No Missing Codes are Guaranteed
12
Bits
Relative Accuracy
±1/2
±1/4
±1/2
LSB typ
Differential Nonlinearity
±1/2
LSB typ
Bipolar Zero Error
±6
LSB max
Positive Full-Scale Error
4
±6
LSB max
Negative Full-Scale Error
4
±6
LSB max
ANALOG INPUT
Input Voltage Range
±3
Volts
Input Current
±550
A max
REFERENCE OUTPUT
5
REF OUT
3
V nom
REF OUT Error @ 25
°C
±10
mV max
TMIN to TMAX
±15
mV max
Reference Load Sensitivity
(
REF OUT/I)
±1
mV max
Reference Load Current Change (0
A–500 A).
Reference Load Should Not Be Changed
During Conversion
LOGIC INPUTS
Input High Voltage, VINH
+2.4
V min
VCC = +5 V ± 5%
Input Low Voltage, VINL
+0.8
V max
VCC = +5 V ± 5%
Input Current, IIN
±10
A max
VIN = 0 to VCC
Input Capacitance, CIN
6
10
pF max
LOGIC OUTPUTS
Output High Voltage, VOH
+2.7
V min
ISOURCE 40 A
Output Low Voltage, VOL
+0.4
V max
ISINK = 1.6 mA
DB11–DB0
Floating State Leakage Current
±10
A max
Floating State Output Capacitance
6
15
pF max
CONVERSION TIME
7/7.125
s min/s max
Assuming No External Read/Write Operations
7/9.250
s min/s max
Assuming 17 External Read/Write Operations
See Internal Comparator Timing Section
POWER REQUIREMENTS
VDD
+5
V nom
±5% for Specified Performance
VCC
+5
V nom
±5% for Specified Performance
VSS
–5
V nom
±5% for Specified Performance
IDD
13
mA max
CS = DMWR = DMRD = 5 V
ICC
100
A max
CS = DMWR = DMRD = 5 V
ISS
6
mA max
CS = DMWR = DMRD = 5 V
Power Dissipation
95.5
mW max
Typically 60 mW
NOTES
1Temperature range as follows: J, K, L versions: 0
°C to +70°C; A, B versions: –25°C to +85°C; S version: –55°C to +125°C.
2V
IN = ± 3 V. See Dynamic Specifications section.
3SNR calculation includes distortion and noise components.
4Measured with respect to the Internal Reference.
5For capacitive loads greater than 50 pF a series resistor is required (see Internal Reference section).
6Sample tested @ +25
°C to ensure compliance.
Specifications subject to change without notice.
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