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AD7877
SERIAL INTERFACE
The AD7877 is controlled via a 3-wire serial peripheral interface
(SPI). The SPI has a data input pin (DIN) for inputting data to
the device, a data output pin (DOUT) for reading data back
from the device, and a data clock pin (DCLK) for clocking data
into and out of the device. A chip-select pin (CS) enables or
disables the serial interface.
Rev. A | Page 28 of 44
WRITING DATA
Data is written to the AD7877 in 16-bit words. The first four
bits of the word are the register address, which tells the AD7877
which register to write to. The next 12 bits are data. How the
AD7877 handles the data bits depends on the register address.
Register Address 0000b is a dummy address, which does
nothing. Register addresses from 0010b to 1110b are 12-bit
registers that perform various functions as described in the
register map.
Register Address 1111b is not a physical register, but enables an
extended writing mode that allows writing to the GPIO
configuration registers. When the register address is 1111b, the
next four bits of the data-word are the address of a GPIO
configuration register and the eight LSBs are the GPIO configu-
ration data. For details on the configuration of the GPIO pins,
see the General-Purpose I/O Pins section.
Register Address 0001b is a physical register, Control Register 1,
but this is a special register. It contains data for setting up the
ADC channel and operating mode, but Bits 20 to 6 are the
register address for reading. These define which register is read
back during the next read operation. Control Register 1 should
be the last register in the AD7877 to be programmed before
starting a conversion. The three types of data-words used for
writing are shown in Figure 45.
0
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
16-BIT DATA-WORD
WADD3
WADD2
WADD1
WADD0
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
WRITING TO A REGISTER
12 BITS DATA
4-BIT REGISTER WRITE ADDRESS
1
1
1
1
EADD3
EADD2
EADD1
EADD0
D7
D6
D5
D4
D3
D2
D1
D0
EXTENDED WRITE OPERATION TO GPIO REGISTERS
8 BITS GPIO DATA
4-BIT EXTENDED ADDRESS
0
0
0
0
SER/DFR CHADD3 CHADD2 CHADD1 CHADD0
RADD4
RADD3
RADD2
RADD1
RADD0
MODE 1
MODE 0
WRITING TO CONTROL REGISTER 1 TO SET ADC CHANNEL, MODE, AND READ REGISTER ADDRESS
ADC CHANNEL ADDRESS
5-BIT READ REGISTER ADDRESS
OPERATING
MODE
EXTENDED WRITE ADDRESS
CONTROL REGISTER 1 ADDRESS
NORMAL (SINGLE-ENDED)/
RATIOMETRIC (DIFFERENTIAL)
CONVERSION
Figure 45. Designation of Data-Word Bits in AD7877 Write Operations
0
DCLK
DOUT
1
DIN
2
CS
NOTES:
1
DATA IS CLOCKED OUT ON THE FALLING EDGE OF DCLK.
2
INPUT DATA IS SAMPLED ON THE RISING EDGE OF DCLK.
3
FOR 8-BIT REGISTERS, 8 LEADING ZEROS PRECEDE 8 BITS OF DATA.
4
REGISTER READ ADDRESS INCREMENTS AUTOMATICALLY, PROVIDED THAT A NEW ADDRESS IS NOT WRITTEN TO CONTROL REGISTER 1.
HIGH-Z
HIGH-Z
1
16
1
REGISTER n + 1 DATA
4
REGISTER n DATA
4
0000 + 12-BIT DATA
3
0000 + 12-BIT DATA
3
4-BIT ADDRESS + 12-BIT DATA
D15
D0
D15
D0
D15
D0
16
Figure 46. Overall Read/Write Timing