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參數(shù)資料
| 型號(hào)： | AD7874SE |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | 10-Bit, 75 MSPS ADC SE/Diff, Int/Ext Ref., program. i/p range w/Pwrdown, comp. to ADS822/3/5/6 28-SSOP |
| 中文描述： | 4-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, CQCC28 |
| 封裝： | CERAMIC, LCC-28 |
| 文件頁(yè)數(shù)： | 6/16頁(yè) |
| 文件大?。?/td> | 414K |
| 代理商： | AD7874SE |
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AD7874
REV. C
–6–
CONVE RT E R DE T AILS
T he AD7874 is a complete 12-bit, 4-channel data acquisition
system. It is comprised of a 12-bit successive approximation
ADC, four high speed track/hold circuits, a four-channel analog
multiplexer and a 3 V Zener reference. T he ADC uses a succes-
sive approximation technique and is based on a fast-settling,
voltage switching DAC, a high speed comparator, a fast CMOS
SAR and high speed logic.
Conversion is initiated on the rising edge of
CONVST
. All four
input track/holds go from track to hold on this edge. Conversion
is first performed on the Channel 1 input voltage, then Channel
2 is converted and so on. T he four results are stored in on-chip
registers. When all four conversions have been completed,
INT
goes low indicating that data can be read from these locations.
T he conversion sequence takes either 78 or 79 rising clock edges
depending on the synchronization of
CONVST
with CLK . In-
ternal delays and reset times bring the total conversion time
from
CONVST
going high to
INT
going low to 32.5
μ
s maxi-
mum for a 2.5 MHz external clock. T he AD7874 uses an im-
plicit addressing scheme whereby four successive reads to the
same memory location access the four data words sequentially.
T he first read accesses Channel 1 data, the second read accesses
Channel 2 data and so on. Individual data registers cannot be
accessed independently.
INT E RNAL RE FE RE NCE
T he AD7874 has an on-chip temperature compensated buried
Zener reference which is factory trimmed to 3 V
±
10 mV (see
Figure 3). T he reference voltage is provided at the REF OUT
pin. T his reference can be used to provide both the reference
voltage for the ADC and the bipolar bias circuitry. T his is
achieved by connecting REF OUT to REF IN.
TEMPERATURE
COMPENSATION
AD7874
V
DD
V
SS
REF OUT
Figure 3. AD7874 Internal Reference
T he reference can also be used as a reference for other compo-
nents and is capable of providing up to 500
μ
A to an external
load. In systems using several AD7874s, using the REF OUT of
one device to provide the REF IN for the other devices ensures
good full-scale tracking between all the AD7874s. Because the
AD7874 REF IN is buffered, each AD7874 presents a high im-
pedance to the reference so one AD7874 REF OUT can drive
several AD7874 REF INs.
T he maximum recommended capacitance on REF OUT for
normal operation is 50 pF. If the reference is required for other
system uses, it should be decoupled to AGND with a 200
re-
sistor in series with a parallel combination of a 10
μ
F tantalum
capacitor and a 0.1
μ
F ceramic capacitor.
E X T E RNAL RE FE RE NCE
In some applications, the user may require a system reference or
some other external reference to drive the AD7874 reference in-
put. Figure 4 shows how the AD586 5 V reference can be used
to provide the 3 V reference required by the AD7874 REF IN.
GND
+V
IN
V
OUT
AGND
10k
15k
1k
V
IN1
TO INTERNAL
COMPARATOR
TRACK/HOLD 1
TO ADC
REFERENCE
CIRCUITRY
7R*
2.1R*
3R*
AD7874**
REF
IN
15V
+
AD586
*R = 3.6k
TYP
**ADDITIONAL PINS OMITTED FOR CLARITY
Figure 4. AD586 Driving AD7874 REF IN
T RACK -AND-HOLD AMPLIFIE R
T he track-and-hold amplifier on each analog input of the
AD7874 allows the ADC to accurately convert an input sine
wave of 20 V p-p amplitude to 12-bit accuracy. T he input band-
width of the track/hold amplifier is greater than the Nyquist rate
of the ADC even when the ADC is operated at its maximum
throughput rate. T he small signal 3 dB cutoff frequency occurs
typically at 500 kHz.
T he four track/hold amplifiers sample their respective input
channels simultaneously. T he aperture delay of the track/hold
circuits is small and, more importantly, is well matched across
the four track/holds on one device and also well matched from
device to device. T his allows the relative phase information be-
tween different input channels to be accurately preserved. It also
allows multiple AD7874s to sample more than four channels
simultaneously.
T he operation of the track/hold amplifiers is essentially transpar-
ent to the user. Once conversion is initiated, the four channels
are automatically converted and there is no need to select which
channel is to be digitized.
ANALOG INPUT
T he analog input of Channel 1 of the AD7874 is as shown in
Figure 4. T he analog input range is
±
10 V into an input resis-
tance of typically 30 k
. T he designed code transitions occur
midway between successive integer LSB values (i.e., 1/2 LSB,
3/2 LSBs, 5/2 LSBs, . . . FS – 3/2 LSBs). T he output code is
2s complement binary with 1 LSB = FS/4096 = 20 V/4096 =
4.88 mV. T he ideal input/output transfer function is shown in
Figure 5.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD7874SE/883B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single-Ended Data Acquisition System |
| AD7874SE3 | 制造商:AD 制造商全稱:Analog Devices 功能描述:LC2MOS 4-Channel, 12-Bit Simultaneous Sampling Data Acquisition System |
| AD7874SQ | 功能描述:IC DAS 12BIT 4CH 5V 28-CDIP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - ADCs/DAC - 專用型 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:50 系列:- 類型:數(shù)據(jù)采集系統(tǒng)（DAS） 分辨率（位）:16 b 采樣率（每秒）:21.94k 數(shù)據(jù)接口:MICROWIRE?，QSPI?，串行，SPI? 電壓電源:模擬和數(shù)字 電源電壓:1.8 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:40-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:40-TQFN-EP（6x6） 包裝:托盤 |
| AD7874SQ/883B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single-Ended Data Acquisition System |
| AD7874SQ3 | 制造商:AD 制造商全稱:Analog Devices 功能描述:LC2MOS 4-Channel, 12-Bit Simultaneous Sampling Data Acquisition System |
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