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AD7859/AD7859L
REV. A
–5–
ABSOLUTE MAXIMUM RATINGS
1
(T
A
= +25
°
C unless otherwise noted)
AV
DD
to AGND . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
DV
DD
to DGND . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
AV
DD
to DV
DD
. . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +0.3 V
Analog Input Voltage to AGND . . . . –0.3 V to AV
DD
+ 0.3 V
Digital Input Voltage to DGND . . . . –0.3 V to DV
DD
+ 0.3 V
Digital Output Voltage to DGND . . . –0.3 V to DV
DD
+ 0.3 V
REF
IN
/REF
OUT
to AGND . . . . . . . . . –0.3 V to AV
DD
+ 0.3 V
Input Current to Any Pin Except Supplies
2
. . . . . . . .
±
10 mA
Operating Temperature Range
Commercial (A, B Versions) . . . . . . . . . . . –40
°
C to +85
°
C
Storage Temperature Range . . . . . . . . . . . –65
°
C to +150
°
C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . +150
°
C
PQFP Package, Power Dissipation . . . . . . . . . . . . . . 450 mW
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 95
°
C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . +215
°
C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . +220
°
C
PLCC Package, Power Dissipation . . . . . . . . . . . . . . 500 mW
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . . 55
°
C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . +215
°
C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . +220
°
C
ESD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >1500 kV
NOTES
1
Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those listed in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
2
Transient currents of up to 100 mA will not cause SCR latchup.
TO OUTPUT
PIN
50pF
1.6mA I
OL
200μA I
OH
+2.1V
Figure 1. Load Circuit for Digital Output Timing
Specifications
ORDERING GUIDE
Linearity
Error
(LSB)
1
Power
Dissipation Package
(mW)
Model
Option
2
AD7859AP
AD7859AS
AD7859BS
AD7859LAS
3
EVAL-AD7859CB
4
EVAL-CONTROL BOARD
5
±
1
±
1
±
1/2
±
1
15
15
15
5.5
P-44A
S-44
S-44
S-44
NOTES
1
Linearity error refers to the integral linearity error.
2
P = PLCC; S = PQFP.
3
L signifies the low power version.
4
This can be used as a stand-alone evaluation board or in conjunction with the
EVAL-CONTROL BOARD for evaluation/demonstration purposes.
5
This board is a complete unit allowing a PC to control and communicate with
all Analog Devices, Inc. evaluation boards ending in the CB designators.
For more information on Analog Devices products and evaluation boards, visit
our World Wide Web home page at http://www.analog.com.
PINOUT FOR PLCC
18
19
20
A
21
A
22
23
24
25
D
26
27
28
2
1
44
3
4
5
6
42
41
40
43
39
38
37
36
35
34
33
32
31
30
29
7
8
9
10
11
12
13
14
15
16
17
NC
W/
B
REF
IN
/REF
OUT
AV
DD
C
REF1
AIN0
C
REF2
AGND
AIN1
AIN2
AIN3
DV
DD
DGND
DB5
DB6
DB7
DB8/HBEN
DB9
DB10
DB11
NC
DB4
AD7859
TOP VIEW
(Not to Scale)
C
N
D
C
B
D
D
D
W
R
C
N
D
D
A
A
C
S
D
PINOUT FOR PQFP
6
7
1
2
3
4
5
8
9
10
11
23
24
25
26
27
28
29
30
31
32
33
2
2
2
1
1
1
1
1
1
1
1
AD7859
TOP VIEW
(Not to Scale)
PIN NO. 1 IDENTIFIER
NC
W/
B
REF
IN
/REF
OUT
AV
DD
C
REF1
AIN0
C
REF2
AGND
AIN1
AIN2
AIN3
DV
DD
DGND
DB5
DB6
DB7
DB8/HBEN
DB9
DB10
DB11
NC
DB4
C
N
D
C
B
D
D
D
W
R
C
N
D
D
D
A
A
A
A
C
S
D
3
3
3
3
3
3
4
4
4
4
4