參數(shù)資料
型號(hào)： AD7859BS
廠商： ANALOG DEVICES INC
元件分類： ADC
英文描述： 3 V to 5 V Single Supply, 200 kSPS 8-Channel, 12-Bit Sampling ADCs
中文描述： 8-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PQFP44
封裝： PLASTIC, QFP-44
文件頁(yè)數(shù)： 22/28頁(yè)
文件大?。?/td> 535K
代理商： AD7859BS
AD7859/AD7859L
REV. A
–22–
Self-Calibration Timing
Figure 29 shows the timing for a software full self-calibration.
Here the BUSY line stays high for the full length of the self-
calibration. A self-calibration is initiated by writing to the
control register and setting the STCAL bit to 1. The BUSY line
goes high at the end of the write to the control register, and
BUSY goes low when the full self-calibration is complete after a
time t
CAL
as show in Figure 29.
t
19
DATA LATCHED INTO
CONTROL REGISTER
HI-Z
HI-Z
DATA
VALID
CS
WR
DATA
BUSY
t
CAL
Figure 29. Timing Diagram for Full Self-Calibration
For the self-(gain + offset), self-offset and self-gain calibrations,
the BUSY line is triggered high at the end of the write to the
control register and stays high for the full duration of the self-
calibration. The length of time for which BUSY is high depends
on the type of self-calibration that is initiated. Typical values are
given in Table IX. The timing diagram for the other self-calibration
options is similar to that outlined in Figure 29.
System Calibration Description
System calibration allows the user to remove system errors ex-
ternal to the AD7859/AD7859L, as well as remove the errors of
the AD7859/AD7859L itself. The maximum calibration range
for the system offset errors is
±
5% of V
REF
and for the system
gain errors, it is
±
2.5% of V
REF
. If the system offset or system
gain errors are outside these ranges, the system calibration algo-
rithm reduces the errors as much as the trim range allows.
Figures 30 through 32 illustrate why a specific type of system
calibration might be used. Figure 30 shows a system offset cali-
bration (assuming a positive offset) where the analog input
range has been shifted upwards by the system offset after the
system offset calibration is completed. A negative offset may
also be removed by a system offset calibration.
MAX SYSTEM FULL SCALE
IS
±
2.5% FROM V
REF
MAX SYSTEM OFFSET
IS
±
5% OF V
REF
ANALOG
INPUT
RANGE
V
REF
+ SYS OFFSET
V
REF
– 1LSB
SYSTEM OFFSET
CALIBRATION
SYS OFFSET
AGND
ANALOG
INPUT
RANGE
V
REF
– 1LSB
SYS OFFSET
AGND
MAX SYSTEM OFFSET
IS
±
5% OF V
REF
Figure 30. System Offset Calibration
Figure 31 shows a system gain calibration (assuming a system
full scale greater than the reference voltage) where the analog
input range has been increased after the system gain calibration
is completed. A system full-scale voltage less than the reference
voltage may also be accounted for a by a system gain calibration.
ANALOG
INPUT
RANGE
MAX SYSTEM FULL SCALE
IS
±
2.5% FROM V
REF
SYSTEM GAIN
CALIBRATION
ANALOG
INPUT
RANGE
V
REF
– 1LSB
AGND
SYS FULL S.
MAX SYSTEM FULL SCALE
IS
±
2.5% FROM V
REF
V
REF
– 1LSB
SYS FULL S.
AGND
Figure 31. System Gain Calibration
Finally in Figure 32 both the system offset error and gain error
are removed by the system offset followed by a system gain cali-
bration. First the analog input range is shifted upwards by the
positive system offset and then the analog input range is adjusted at
the top end to account for the system full scale.
MAX SYSTEM FULL SCALE
IS
±
2.5% FROM V
REF
ANALOG
INPUT
RANGE
V
REF
+ SYS OFFSET
SYS OFFSET
AGND
ANALOG
INPUT
RANGE
V
REF
– 1LSB
SYS OFFSET
AGND
MAX SYSTEM OFFSET
IS
±
5% OF V
REF
MAX SYSTEM OFFSET
IS
±
5% OF V
REF
SYSTEM GAIN
CALIBRATION
SYSTEM OFFSET
CALIBRATION
FOLLOWED BY
V
REF
– 1LSB
SYS F.S.
SYS F.S.
MAX SYSTEM FULL SCALE
IS
±
2.5% FROM V
REF
Figure 32. System (Gain + Offset) Calibration
相關(guān)PDF資料
PDF描述
AD7859L* 5V Low Power RS232 Transceiver; Package: PDIP; No of Pins: 16; Temperature Range: 0°C to +70°C
AD7859LAS 3 V to 5 V Single Supply, 200 kSPS 8-Channel, 12-Bit Sampling ADCs
AD7859L 3 V to 5 V Single Supply, 200 kSPS 8-Channel, 12-Bit Sampling ADCs(單電源,200kSPS 8通道12位采樣A/D轉(zhuǎn)換器)
AD7859 3 V to 5 V Single Supply, 200 kSPS 8-Channel, 12-Bit Sampling ADCs(單電源,200kSPS 8通道12位采樣A/D轉(zhuǎn)換器)
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD7859BSZ 功能描述:IC ADC 12BIT 8CHAN LP 44-MQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 位數(shù):12 采樣率（每秒）:300k 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:75mW 電壓電源:單電源 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:24-SOIC 包裝:帶卷 (TR) 輸入數(shù)目和類型:1 個(gè)單端，單極；1 個(gè)單端，雙極
AD7859L 制造商:AD 制造商全稱:Analog Devices 功能描述:3 V to 5 V Single Supply, 200 kSPS 8-Channel, 12-Bit Sampling ADCs
AD7859LAS 制造商:Analog Devices 功能描述:ADC Single SAR 100ksps 12-bit Parallel 44-Pin MQFP 制造商:Rochester Electronics LLC 功能描述:12-BIT 8 CH.PARALLEL 100 KSPS I.C. - Bulk 制造商:Analog Devices 功能描述:IC 12-BIT ADC
AD7859LAS3 制造商:AD 制造商全稱:Analog Devices 功能描述:3 V to 5 V Single Supply, 200 kSPS8-Channel, 12-Bit Sampling ADCs
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