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    • 參數(shù)資料
      型號: AD7858BR-REEL
      廠商: Analog Devices Inc
      文件頁數(shù): 2/32頁
      文件大小: 0K
      描述: IC ADC 12BIT 8CH SRL 24-SOIC
      產(chǎn)品變化通告: Product Discontinuance 27/Oct/2011
      標(biāo)準(zhǔn)包裝: 1,000
      位數(shù): 12
      采樣率(每秒): 200k
      數(shù)據(jù)接口: 8051,QSPI?,串行,SPI? µP
      轉(zhuǎn)換器數(shù)目: 2
      功率耗散(最大): 33mW
      電壓電源: 模擬和數(shù)字
      工作溫度: -40°C ~ 85°C
      安裝類型: 表面貼裝
      封裝/外殼: 24-SOIC(0.295",7.50mm 寬)
      供應(yīng)商設(shè)備封裝: 24-SOIC W
      包裝: 帶卷 (TR)
      輸入數(shù)目和類型: 8 個單端,單極;4 個偽差分,單極
      REV. B
      –10–
      AD7858/AD7858L
      CONTROL REGISTER
      The arrangement of the Control Register is shown below. The control register is a write only register and contains 14 bits of data.
      The control register is selected by putting two 1s in ADDR1 and ADDR0. The function of the bits in the control register are de-
      scribed below. The power-up status of all bits is 0.
      MSB
      SGL/
      DIFF
      CH2
      CH1
      CH0
      PMGT1
      PMGT0
      RDSLT1
      RDSLT0
      2/
      3 MODE
      CONVST
      CALMD
      CALSLT1
      CALSLT0
      STCAL
      LSB
      CONTROL REGISTER BIT FUNCTION DESCRIPTION
      Bit
      Mnemonic
      Comment
      13
      SGL/
      DIFF
      A 0 in this bit position configures the input channels in pseudo-differential mode. A 1 in this bit position
      configures the input channels in single-ended mode (see Table III).
      12
      CH2
      These three bits are used to select the channel on which the conversion is performed. The channels can
      11
      CH1
      be configured as eight single-ended channels or four pseudo-differential channels. The default selection
      10
      CH0
      is AIN1 for the positive input and AIN2 for the negative input (see Table III for channel selection).
      9
      PMGT1
      Power Management Bits. These two bits are used with the
      SLEEP pin for putting the part into various
      8
      PMGT0
      Power-Down Modes (see Power-Down section for more details).
      7
      RDSLT1
      Theses two bits determine which register is addressed for the read operations (see Table II).
      6
      RDSLT0
      52/
      3 MODE
      Interface Mode Select Bit. With this bit set to 0, Interface Mode 2 is enabled. With this bit set to 1,
      Interface Mode 1 is enabled where DIN is used as an output as well as an input. This bit is set to 0 by
      default after every read cycle; thus when using the Two-Wire Interface Mode, this bit needs to be set to
      1 in every write cycle.
      4
      CONVST
      Conversion Start Bit. A logic one in this bit position starts a single conversion, and this bit is automati-
      cally reset to 0 at the end of conversion. This bit may also be used in conjunction with system calibration
      (see Calibration section.)
      3
      CALMD
      Calibration Mode Bit. A 0 here selects self-calibration, and a 1 selects a system calibration (see Table IV).
      2
      CALSLT1
      Calibration Selection Bits and Start Calibration Bit. These bits have two functions.
      1
      CALSLT0
      With the STCAL bit set to 1 the CALSLT1 and CALSLT0 bits determine the type of calibration per
      0
      STCAL
      formed by the part (see Table IV). The STCAL bit is automatically reset to 0 at the end of calibration.
      With the STCAL bit set to 0 the CALSLT1 and CALSLT0 bits are decoded to address the calibration
      register for read/write of calibration coefficients (see section on the Calibration Registers for more details).
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      AD7858BRZ 功能描述:IC ADC 12BIT 8CHAN SRL 24SOIC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):14 采樣率(每秒):83k 數(shù)據(jù)接口:串行,并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散(最大):95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP(0.600",15.24mm) 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個單端,雙極
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