參數(shù)資料
型號： AD7854LARS
廠商： Analog Devices Inc
文件頁數(shù)： 7/28頁
文件大?。?/td> 0K
描述： IC ADC 12BIT PARALLEL LP 28-SSOP
產(chǎn)品變化通告： Product Discontinuance 27/Oct/2011
標準包裝： 47
位數(shù)： 12
采樣率（每秒）： 100k
數(shù)據(jù)接口： 并聯(lián)
轉(zhuǎn)換器數(shù)目： 2
功率耗散（最大）： 30mW
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 28-SSOP（0.209"，5.30mm 寬）
供應(yīng)商設(shè)備封裝： 28-SSOP
包裝： 管件
輸入數(shù)目和類型： 1 個偽差分，單極；1 個偽差分，雙極
AD7854/AD7854L
REV. B
–15–
Transfer Functions
For the unipolar range the designed code transitions occur
midway between successive integer LSB values (i.e., 1/2 LSB,
3/2 LSBs, 5/2 LSBs . . . FS – 3/2 LSBs). The output coding is
straight binary for the unipolar range with 1 LSB = FS/4096 =
3.3 V/4096 = 0.8 mV when VREF = 3.3 V. The ideal input/
output transfer characteristic for the unipolar range is shown in
Figure 14.
OUTPUT
CODE
111...111
111...110
111...101
111...100
000...011
000...010
000...001
000...000
0V 1LSB
+FS –1LSB
VIN = (AIN(+) – AIN(–)), INPUT VOLTAGE
1LSB =
FS
4096
Figure 14. AD7854/AD7854L Unipolar Transfer
Characteristic
Figure 13 shows the AD7854/AD7854L’s
±VREF/2 bipolar ana-
log input configuration. AIN(+) cannot go below 0 V, so for the
full bipolar range, AIN(–) should be biased to at least +VREF/2.
Once again the designed code transitions occur midway between
successive integer LSB values. The output coding is twos
complement with 1 LSB = 4096 = 3.3 V/4096 = 0.8 mV. The
ideal input/output transfer characteristic is shown in Figure 15.
OUTPUT
CODE
011...111
011...110
000...001
111...111
000...000
000...010
000...001
000...000
VIN = (AIN(+) – AIN(–)), INPUT VOLTAGE
1LSB =
FS
4096
0V
(VREF/2) – 1LSB
(VREF/2) + 1 LSB
VREF/2
+ FS – 1LSB
FS = VREFV
Figure 15. AD7854/AD7854L Bipolar Transfer Characteristic
Input Ranges
The analog input range for the AD7854/AD7854L is 0 V to
VREF in both the unipolar and bipolar ranges.
The only difference between the unipolar range and the bipolar
range is that in the bipolar range the AIN(–) should be biased
up to at least +VREF/2 and the output coding is twos comple-
ment (see Table V and Figures 14 and 15).
Table V. Analog Input Connections
Analog Input
Input Connections
Connection
Range
AIN(+)
AIN(–)
Diagram
0 V to VREF
1
VIN
AGND
Figure 12
±VREF/22
VIN
VREF/2
Figure 13
NOTES
1Output code format is straight binary.
2Range is
±V
REF/2 biased about VREF/2. Output code format is twos complement.
Note that the AIN(–) pin on the AD7854/AD7854L can be
biased up above AGND in the unipolar mode, or above VREF/2
in bipolar mode if required. The advantage of biasing the lower
end of the analog input range away from AGND is that the analog
input does not have to swing all the way down to AGND. Thus,
in single supply applications the input amplifier does not have to
swing all the way down to AGND. The upper end of the analog
input range is shifted up by the same amount. Care must be
taken so that the bias applied does not shift the upper end of the
analog input above the AVDD supply. In the case where the ref-
erence is the supply, AVDD, the AIN(–) should be tied to AGND
in unipolar mode or to AVDD/2 in bipolar mode.
. . .
AIN(+)
AIN(–)
VIN = 0 TO VREF
TRACK AND HOLD
AMPLIFIER
DB0
DB11
STRAIGHT
BINARY
FORMAT
AD7854/AD7854L
Figure 12. 0 to VREF Unipolar Input Configuration
2’S
COMPLEMENT
FORMAT
VREF/2
. . .
AIN(+)
AIN(–)
VIN = 0 TO VREF
TRACK AND HOLD
AMPLIFIER
DB0
DB11
AD7854/AD7854L
Figure 13.
±VREF/2 about VREF/2 Bipolar Input Configuration
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AD7854LARZ 功能描述:IC ADC 12BIT PARALLEL LP 28-SOIC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 其它有關(guān)文件:TSA1204 View All Specifications 標準包裝:1 系列:- 位數(shù):12 采樣率（每秒）:20M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:155mW 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應(yīng)商設(shè)備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數(shù)目和類型:4 個單端，單極；2 個差分，單極 產(chǎn)品目錄頁面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6
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