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參數(shù)資料
| 型號： | AD7849BRZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 3/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 14/16BIT SRL-IN 20-SOIC |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 標(biāo)準(zhǔn)包裝： | 37 |
| 設(shè)置時(shí)間： | 7µs |
| 位數(shù)： | 16 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 模擬和數(shù)字，雙 ± |
| 功率耗散（最大）： | 100mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 20-SOIC W |
| 包裝： | 管件 |
| 輸出數(shù)目和類型： | 1 電壓，單極；1 電壓，雙極 |
| 采樣率（每秒）： | 143k |
| 產(chǎn)品目錄頁面： | 785 (CN2011-ZH PDF) |
AD7849
Rev. C | Page 11 of 20
CIRCUIT DESCRIPTION
DIGITAL-TO-ANALOG CONVERSION
are three on-chip DACs, each of which has its own buffer amplifier.
DAC1 and DAC2 are 4-bit DACs. They share a 16-resistor string,
but they have their own analog multiplexers. The voltage reference
is applied to the resistor string. DAC3 is a 12-bit voltage mode
DAC with its own output stage.
The four MSBs of the 16-bit digital input code drive DAC1 and
DAC2, while the 12 LSBs control DAC3. Using DAC1 and DAC2,
the MSBs select a pair of adjacent nodes on the resistor string
and present that voltage to the positive and negative inputs of
DAC3. This DAC interpolates between these two voltages to
produce the analog output voltage.
To prevent nonmonotonicity in the DAC due to amplifier offset
voltages, DAC1 and DAC2 leap-frog along the resistor string.
For example, when switching from Segment 1 to Segment 2, DAC1
switches from the bottom of Segment 1 to the top of Segment 2
while DAC 2 remains connected to the top of Segment 1. The
code driving DAC3 is automatically complemented to compensate
for the inversion of its inputs. This means that any linearity
effects due to amplifier offset voltages remain unchanged when
switching from one segment to the next, and 16-bit monotonicity is
ensured if DAC3 is monotonic. Therefore, 12-bit resistor matching
in DAC3 guarantees overall 16-bit monotonicity. This is much
more achievable than the 16-bit matching that a conventional
R-2R structure would need.
Output Stage
of driving a 2 kΩ load in parallel with 200 pF. The feedback and
offset resistors allow the output stage to be configured for gains of
1 or 2. Additionally, the offset resistor can be used to shift the
output range. The AD7849 has a special feature to ensure output
stability during power-up and power-down sequences. This feature
is available for control applications where actuators must not be
allowed to move in an uncontrolled fashion.
LOGIC
CIRCUITRY
ONE-SHOT
LDAC
DAC 3
G3
C1
R
10k
R
10k
ROFS
RSTIN
G1
VOUT
AGND
RSTOUT
G2
VOLTAGE
MONITOR
01008
-015
Figure 14. Output Stage
When the supply voltages are changing, the VOUT pin is clamped
to 0 V via a low impedance path. To prevent the output of A3
from being shorted to 0 V during this time, Transmission Gate G1
is opened. These conditions are maintained until the power
supplies stabilize, and a valid word is written to the DAC register.
At this time, G2 opens and G1 closes. Both transmission gates
are also externally controllable via the reset in (RSTIN) control
input. For instance, if the RSTIN input is driven from a battery
supervisor chip, then at power-off or during a brownout, the
RSTIN input will be driven low to open G1 and closeG2. The
DAC has to be reloaded, with RSTIN high, to reenable the output.
Conversely, the on-chip voltage detector output (RSTOUT) is
also available to the user to control other parts of the system.
The AD7849 output buffer is configured as a track-and-hold
amplifier. Although normally tracking its input, this amplifier
isplaced in hold mode for approximately 5 μs after the leading
edge of LDAC. This short state keeps the DAC output at its
previous voltage while the
is internally changing to its
new value. therefore, any glitches that occur in the transition are
not seen at the output. In systems where
LDAC is permanently
low, deglitching is not in operation.
10/12
DAC 2
A1
A2
DAC 3
10-BIT/12-BIT
DAC
S2
S4
S14
S16
DB15 TO DB12
DAC 1
S1
S3
S15
S17
VREF+
VREF–
OUTPUT
STAGE
R
01
008-016
Figure 15. Digital-to-Analog Conversion
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD7849BRZ | 制造商:Analog Devices 功能描述:IC, DAC, 16BIT, 143KSPS, SOIC-20 |
| AD7849BRZ-REEL | 功能描述:IC DAC 14/16BIT SRL-IN 20-SOIC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Data Converter Fundamentals DAC Architectures 標(biāo)準(zhǔn)包裝:750 系列:- 設(shè)置時(shí)間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:雙 ± 功率耗散（最大）:100mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-LCC（J 形引線） 供應(yīng)商設(shè)備封裝:28-PLCC（11.51x11.51） 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:143k |
| AD7849CN | 制造商:Analog Devices 功能描述:DAC 1-CH R-2R 16-bit 20-Pin PDIP N Tube 制造商:Analog Devices 功能描述:SEMICONDUCTORSLINEAR |
| AD7849CNZ | 功能描述:IC DAC 16BIT SERIAL INP 20DIP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Data Converter Fundamentals DAC Architectures 標(biāo)準(zhǔn)包裝:750 系列:- 設(shè)置時(shí)間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:雙 ± 功率耗散（最大）:100mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-LCC（J 形引線） 供應(yīng)商設(shè)備封裝:28-PLCC（11.51x11.51） 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:143k |
| AD7849CR | 功能描述:IC DAC 16BIT SRL INP 20-SOIC RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Data Converter Fundamentals DAC Architectures 標(biāo)準(zhǔn)包裝:750 系列:- 設(shè)置時(shí)間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:雙 ± 功率耗散（最大）:100mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-LCC（J 形引線） 供應(yīng)商設(shè)備封裝:28-PLCC（11.51x11.51） 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:143k |
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