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參數(shù)資料
| 型號： | AD7819YRUZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 5/11頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 8BIT SAMPLING PAR 16TSSOP |
| 標準包裝： | 1,000 |
| 位數(shù)： | 8 |
| 采樣率（每秒）： | 200k |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 17.5mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-TSSOP |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 1 個單端，單極 |
REV. B
AD7819
–3–
TIMING CHARACTERISTICS1, 2
Parameter
V
DD = 3 V
10%
V
DD = 5 V
10%
Unit
Conditions/Comments
tPOWER-UP
1.5
s (max)
Power-Up Time of AD7819 after Rising Edge of
CONVST.
t1
4.5
s (max)
Conversion Time.
t2
30
ns (min)
CONVST Pulsewidth.
t3
30
ns (max)
CONVST Falling Edge to BUSY Rising Edge Delay.
t4
0
ns (min)
CS to RD Setup Time.
t5
0
ns (min)
CS Hold Time after RD High.
t6
3
10
ns (max)
Data Access Time after
RD Low.
t7
3, 4
10
ns (max)
Bus Relinquish Time after
RD High.
t8
3
100
ns (min)
Data Bus Relinquish to Falling Edge of
CONVST Delay.
NOTES
1Sample tested to ensure compliance.
2See Figures 12, 13 and 14.
3These numbers are measured with the load circuit of Figure 1. They are defined as the time required for the o/p to cross 0.8 V or 2.4 V for V
DD = 5 V
± 10% and
0.4 V or 2 V for VDD = 3 V
± 10%.
4Derived from the measured time taken by the data outputs to change 0.5 V when loaded with the circuit of Figure 1. The measured number is then extrapolated back
to remove the effects of charging or discharging the 50 pF capacitor. This means that the time, t 7, quoted in the Timing Characteristics is the true bus relinquish time
of the part and as such is independent of external bus loading capacitances.
Specifications subject to change without notice.
(–40 C to +125 C, unless otherwise noted)
ABSOLUTE MAXIMUM RATINGS
*
VDD to DGND . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
Digital Input Voltage to DGND
(
CONVST, RD, CS) . . . . . . . . . . . . . . –0.3 V, V
DD + 0.3 V
Digital Output Voltage to DGND
(BUSY, DB0–DB7) . . . . . . . . . . . . . . . –0.3 V, VDD + 0.3 V
REFIN to AGND . . . . . . . . . . . . . . . . . . . –0.3 V, VDD + 0.3 V
Analog Input . . . . . . . . . . . . . . . . . . . . . . –0.3 V, VDD + 0.3 V
Storage Temperature Range . . . . . . . . . . . . –65
°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150
°C
Plastic DIP Package, Power Dissipation . . . . . . . . . . 450 mW
θ
JA Thermal Impedance . . . . . . . . . . . . . . . . . . . . 105
°C/W
Lead Temperature, (Soldering 10 sec) . . . . . . . . . . . . 260
°C
SOIC Package, Power Dissipation . . . . . . . . . . . . . . . 450 mW
θ
JA Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 75
°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . 215
°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . 220
°C
SSOP Package, Power Dissipation . . . . . . . . . . . . . . . 450 mW
θJA Thermal Impedance . . . . . . . . . . . . . . . . . . . . 115°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . 215
°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . 220
°C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
1.6V
200 A
IOL
200 A
IOH
CL
50pF
TO
OUTPUT
PIN
Figure 1. Load Circuit for Digital Output Timing
Specifications
ORDERING GUIDE
Linearity
Error
Package
Model
(LSB)
Description
Option
AD7819YN
±1 LSB
Plastic DIP
N-16
AD7819YR
±1 LSB
Small Outline IC
R-16A
AD7819YRU
±1 LSB
Thin Shrink Small Outline RU-16
(TSSOP)
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD7819 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
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| AD7819YRZ | 功能描述:IC ADC 8BIT SAMPLING PAR 16-SOIC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標準包裝:1 系列:microPOWER™ 位數(shù):8 采樣率（每秒）:1M 數(shù)據(jù)接口:串行，SPI? 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:- 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:24-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-VQFN 裸露焊盤（4x4） 包裝:Digi-Reel® 輸入數(shù)目和類型:8 個單端，單極 產(chǎn)品目錄頁面:892 (CN2011-ZH PDF) 其它名稱:296-25851-6 |
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