參數(shù)資料
型號： AD7794BRUZ
廠商： Analog Devices Inc
文件頁數(shù)： 6/37頁
文件大?。?/td> 0K
描述： IC ADC 24BIT SIG-DEL 6CH 24TSSOP
產(chǎn)品培訓(xùn)模塊： ADC Applications
ADC Architectures
ADC DC/AC Performance
標(biāo)準(zhǔn)包裝： 62
位數(shù)： 24
采樣率（每秒）： 470
數(shù)據(jù)接口： DSP，MICROWIRE?，QSPI?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 1
功率耗散（最大）： 2.5mW
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 105°C
安裝類型： 表面貼裝
封裝/外殼： 24-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 24-TSSOP
包裝： 管件
輸入數(shù)目和類型： 6 個(gè)差分，單極；6 個(gè)差分，雙極
產(chǎn)品目錄頁面： 779 (CN2011-ZH PDF)
配用： EVAL-AD7794EBZ-ND - BOARD EVALUATION FOR AD7794
AD7794/AD7795
Rev. D | Page 13 of 36
RMS NOISE AND RESOLUTION SPECIFICATIONS
The AD7794/AD7795 can be operated with chop enabled or
chop disabled, allowing the ADC to be optimized for switching
time or drift performance. With chop enabled, the settling time
is two times the conversion time. However, the offset is
continuously removed by the ADC leading to low offset and low
offset drift. With chop disabled, the allowable update rates are
the same as in chop enable mode. However, the settling time
now equals the conversion time. With chop disabled, the offset
is not removed by the ADC, so periodic offset calibrations can
be required to remove offset due to drift.
CHOP ENABLED
External Reference
Table 5 shows the AD7794/AD7795 rms noise for some update
rates and gain settings. The numbers given are for the bipolar
input range with an external 2.5 V reference. These numbers are
typical and are generated with a differential input voltage of 0 V.
Table 6 and Table 7 show the effective resolution, while the
output peak-to-peak (p-p) resolution is listed in brackets. It is
important to note that the effective resolution is calculated
using the rms noise, while the p-p resolution is calculated based
on peak-to-peak noise. The p-p resolution represents the
resolution for which there is no code flicker. These numbers are
typical and are rounded to the nearest LSB.
Table 5. RMS Noise (μV) vs. Gain and Output Update Rate Using an External 2.5 V Reference with Chop Enabled
Update Rate (Hz)
Gain of 1
Gain of 2
Gain of 4
Gain of 8
Gain of 16
Gain of 32
Gain of 64
Gain of 128
4.17
0.64
0.6
0.29
0.22
0.1
0.065
0.039
0.041
8.33
1.04
0.96
0.38
0.26
0.13
0.078
0.057
0.055
16.7
1.55
1.45
0.54
0.36
0.18
0.11
0.087
0.086
33.2
2.3
2.13
0.74
0.5
0.23
0.17
0.124
0.118
62
2.95
2.85
0.92
0.58
0.29
0.2
0.153
0.144
123
4.89
4.74
1.49
1
0.48
0.32
0.265
0.283
242
11.76
9.5
4.02
1.96
0.88
0.45
0.379
0.397
470
11.33
9.44
3.07
1.79
0.99
0.63
0.568
0.593
Table 6.
Effective Resolution (Bits) vs. Gain and Output Update Rate for the AD7794 Using an External 2.5 V Reference with Chop Enabled
Update Rate (Hz)
Gain of 1
Gain of 2
Gain of 4
Gain of 8
Gain of 16
Gain of 32
Gain of 64
Gain of 128
4.17
23 (20.5)
22 (19.5)
21.5 (19)
21 (18.5)
20 (17.5)
8.33
22 (19.5)
21.5 (19)
21 (18.5)
20.5 (18)
19.5 (17)
16.7
21.5 (19)
20.5 (18)
21 (18.5)
20.5 (18)
20 (17.5)
19 (16.5)
33.2
21 (18.5)
20 (17.5)
20.5 (18)
20 (17.5)
20.5 (18)
20 (17.5)
19 (16.5)
18.5 (16)
62
20.5 (18)
19.5 (17)
20.5 (18)
20 (17.5)
19.5 (17)
19 (16.5)
18 (15.5)
123
20 (17.5)
19 (16.5)
19.5 (17)
19 (16.5)
19.5 (17)
19 (16.5)
18 (15.5)
17 (14.5)
242
18.5 (16)
18 (15.5)
18.5 (16)
17.5 (15)
16.5 (14)
470
18.5 (16)
18 (15.5)
18.5 (16)
18 (15.5)
17 (14.5)
16 (13.5)
Table 7.
Effective Resolution (Bits) vs. Gain and Output Update Rate for the AD7795 Using an External 2.5 V Reference with Chop Enabled
Update Rate (Hz)
Gain of 1
Gain of 2
Gain of 4
Gain of 8
Gain of 16
Gain of 32
Gain of 64
Gain of 128
4.17
16 (16)
8.33
16 (16)
16.7
16 (16)
33.2
16 (16)
62
16 (16)
16 (15.5)
123
16 (16)
16 (15.5)
16 (14.5)
242
16 (16)
16 (15.5)
16 (16)
16 (15)
16 (14)
470
16 (16)
16 (15.5)
16 (16)
16 (15.5)
16 (14.5)
16 (13.5)
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