參數(shù)資料
型號: AD7794BRUZ-REEL
廠商: Analog Devices Inc
文件頁數(shù): 11/37頁
文件大小: 0K
描述: IC ADC 24BIT 6CH LP 24-TSSOP
產(chǎn)品培訓(xùn)模塊: ADC Applications
ADC Architectures
ADC DC/AC Performance
標(biāo)準(zhǔn)包裝: 2,500
位數(shù): 24
采樣率(每秒): 470
數(shù)據(jù)接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 2.5mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 24-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 24-TSSOP
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 6 個差分,單極;6 個差分,雙極
配用: EVAL-AD7794EBZ-ND - BOARD EVALUATION FOR AD7794
AD7794/AD7795
Rev. D | Page 18 of 36
STATUS REGISTER
RS2, RS1, RS0 = 0, 0, 0; Power-On/Reset = 0x80
(AD7795)/0x88 (AD7794)
The status register is an 8-bit read-only register. To access the
ADC status register, the user must write to the communications
register, select the next operation to be read, and load Bit RS2,
Bit RS1, and Bit RS0 with 0.
Table 16 outlines the bit designations for the status register. SR0
through SR7 indicate the bit locations, with SR denoting that
the bits are in the status register. SR7 denotes the first bit of the
data stream. The number in brackets indicates the power-
on/reset default status of that bit.
SR7
SR6
SR5
SR4
SR3
SR2
SR1
SR0
RDY(1)
ERR(0)
NOXREF(0)
0(0)
0/1
CH2(0)
CH1(0)
CH0(0)
Table 16. Status Register Bit Designations
Bit No.
Mnemonic
Description
SR7
RDY
Ready Bit for ADC. Cleared when data is written to the ADC data register. The RDY bit is set automatically after the
ADC data register has been read or a period of time before the data register is updated with a new conversion
result to indicate to the user not to read the conversion data. It is also set when the part is placed in power-down
mode. The end of a conversion is also indicated by the DOUT/RDY pin. This pin can be used as an alternative to the
status register for monitoring the ADC for conversion data.
SR6
ERR
ADC Error Bit. This bit is written to at the same time as the RDY bit. Set to indicate that the result written to the
ADC data register has been clamped to all 0s or all 1s. Error sources include overrange, underrange, or the absence
of a reference voltage. Cleared by a write operation to start a conversion.
SR5
NOXREF
No External Reference Bit. Set to indicate that the selected reference (REFIN1 or REFIN2) is at a voltage that is
below a specified threshold. When set, conversion results are clamped to all 1s. Cleared to indicate that a valid
reference is applied to the selected reference pins. The NOXREF bit is enabled by setting the REF_DET bit in the
configuration register to 1. The ERR bit is also set if the voltage applied to the selected reference input is invalid.
SR4
0
This bit is automatically cleared.
SR3
0/1
This bit is automatically cleared on the AD7795 and is automatically set on the AD7794.
SR2 to
SR0
CH2 to CH0
These bits indicate which channel is being converted by the ADC.
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