參數(shù)資料
型號(hào): AD7750AR
廠商: ANALOG DEVICES INC
元件分類: 模擬信號(hào)調(diào)理
英文描述: Product-to-Frequency Converter
中文描述: SPECIALTY ANALOG CIRCUIT, PDSO20
封裝: SOIC-20
文件頁(yè)數(shù): 7/16頁(yè)
文件大?。?/td> 195K
代理商: AD7750AR
AD7750
–7–
REV. 0
ANALOG INPUT S
T he analog inputs of the AD7750 are high impedance bipolar
voltage inputs. T he four voltage inputs make up two truly
differential voltage input channels called V
1
and V
2
. As with
any ADC, an antialiasing filter or low-pass filter is required on
the analog input. T he AD7750 is designed with a unique
switched capacitor architecture that allows a bipolar analog
input with a single 5 V power supply. T he four analog inputs
(V
1+
, V
1–
, V
2+
, V
2–
) each have a voltage range from –1.0 V to
+1.0 V. T his is an absolute voltage range and is relative to the
ground (AGND) pin. T his ground is nominally at a potential of
0 V relative to the board level ground. Figure 8 shows a very
simplified diagram of the analog input structure. When the ana-
log input voltage is sampled, the switch is closed and a very
small sampling capacitor is charged up to the input voltage. T he
resistor in the diagram can be thought of as a lumped compo-
nent made up of the on resistance of various switches.
V
IN
R
1.4k
V
C
2pF
SAMPLING
CAPACITOR
Figure 8. Equivalent Analog Input Circuit
Analog Inputs Protection Circuitry
T he analog input section also has protection circuitry. Since the
power supply rails are 0 V to 5 V, the analog inputs can no
longer be clamped to the supply rails by diodes. T hus, the inter-
nal protection circuitry monitors the current paths during a fault
condition and protects the device from continuous overvoltage,
continuous undervoltage and ESD events. T he maximum over-
voltage the AD7750 analog inputs can withstand without caus-
ing irreversible damage is
±
6 V relative to AGND pin.
In the case of continuous overvoltage and undervoltage the
series resistance of the antialiasing filter can be used to limit
input current. T he total input current in the case of a fault
should be limited to 10 mA.
For normal operation of the AD7750 there are two further re-
strictions on the signal levels presented to the analog inputs.
1. T he voltage on any input relative to the AGND pin must not
exceed
±
1 V.
2. T he differential voltage presented to the ADC (Analog
Modulator) must not exceed
±
2 V.
In Figure 12, Channel 1 has a peak voltage on V
1+
and V
1–
of
±
1 V. These signals are not gained (G1 = 0) and so the
differential signal presented to the modulator is
±
2 V.
However, Channel 2 has an associated gain of two and so
care must be taken to ensure the modulator input does not
exceed
±
2 V. T herefore, the maximum signal voltage that
can appear on V
2+
and V
2–
is
±
0.5 V.
T he difference between single-ended and complementary
differential input schemes is shown in the diagram below,
Figure 9. For a single-ended input scheme the V– input is
held at the same potential as the AGND Pin. T he maxi-
mum voltages can then be applied to the V+ input are
shown in Figures 10 and 11. An example of this input
scheme uses a shunt resistor to convert the line current to a
voltage that is then applied to the V
1+
input of the AD7750.
An example of the complementary differential input scheme
uses a current transformer to convert the line current to a
voltage that is then applied to V
1+
and V
1–
. With this
scheme the voltage on the V+ input is always equal to, but
of opposite polarity to the voltage on V–. T he maximum
voltage that can be applied to the inputs of the AD7750
using this scheme is shown in Figures 12 and 13.
Note that the common mode of the analog inputs must
be driven. T he output terminals of the CT are, therefore,
referenced to ground.
A CURRENT TRANSFORMER
PROVIDES COMPLEMENTARY
DIFFERENTIAL INPUTS TO THE
AD7750
A CURRENT SENSE RESISTOR
PROVIDES A SINGLE-ENDED
INPUT TO THE AD7750
V+
V–
V–
V+
SHUNT
RESISTOR
Figure 9. Examples of Complementary and Single-
Ended Input Schemes
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