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參數(shù)資料
| 型號(hào)： | AD7746ARUZ-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 16/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CONV 2CH CAP TO DGTL 16-TSSOP |
| 設(shè)計(jì)資源： | Extending the Capacitive Input Range of AD7745/AD7746 (CN0129) |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 類型： | 電容數(shù)字轉(zhuǎn)換器 |
| 分辨率（位）： | 24 b |
| 數(shù)據(jù)接口： | 串行 |
| 電壓電源： | 單電源 |
| 電源電壓： | 2.7 V ~ 5.25 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-TSSOP |
| 包裝： | 帶卷 (TR) |
| 配用： | EVAL-AD7746EBZ-ND - BOARD EVALUATION FOR AD7746 |
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AD7745/AD7746
Rev. 0| Page 23 of 28
PARASITIC SERIAL RESISTANCE
DATA
CDC
EXC
RS1
CIN
RS2
CX
05468-023
Figure 39. Parasitic Serial Resistance
The AD7745/AD7746 CDC result is affected by a resistance in
series with the measured capacitance. The total serial resistance,
for the specified performance. See typical performance charac-
teristics shown in Figure 15.
CAPACITIVE GAIN CALIBRATION
The AD7745/AD7746 gain is factory calibrated for the full scale
of ±4.096 pF in the production for each part individually. The
factory gain coefficient is stored in a one-time programmable
(OTP) memory and is copied to the capacitive gain register at
power-up or after reset.
The gain can be changed by executing a capacitance gain
calibration mode, for which an external full-scale capacitance
needs to be connected to the capacitance input, or by writing a
user value to the capacitive gain register. This change would be
only temporary and the factory gain coefficient would be
reloaded back after power-up or reset. The part is tested and
specified only for use with the default factory calibration
coefficient.
CAPACITIVE SYSTEM OFFSET CALIBRATION
The capacitive offset is dominated by the parasitic offset in the
application, such as the initial capacitance of the sensor, any
parasitic capacitance of tracks on the board, and the capacitance
of any other connections between the sensor and the CDC.
Therefore, the AD7745/AD7746 are not factory calibrated for
capacitive offset. It is the user’s responsibility to calibrate the
system capacitance offset in the application.
Any offset in the capacitance input larger than ±1 pF should
first be removed using the on-chip CAPDACs. The small offset
within ±1 pF can then be removed by using the capacitance
offset calibration register.
One method of adjusting the offset is to connect a zero-scale
capacitance to the input and execute the capacitance offset
calibration mode. The calibration sets the midpoint of the
±4.096 pF range (that is, Output Code 0x800000) to that
zero-scale input.
Another method would be to calculate and write the offset cali-
bration register value, the LSB is value 31.25 aF (4.096 pF/217).
The offset calibration register is reloaded by the default value at
power-on or after reset. Therefore, if the offset calibration is not
repeated after each system power-up, the calibration coefficient
value should be stored by the host controller and reloaded as
part of the AD7745/AD7746 setup.
On the AD7746, the register is shared by the two capacitive
channels. If the capacitive channels need to be offset calibrated
individually, the host controller software should read the
AD7746 capacitive offset calibration register values after
performing the offset calibration on individual channels and
then reload the values back to the AD7746 before executing a
conversion on a different channel.
INTERNAL TEMPERATURE SENSOR
DIGITAL
FILTER
AND
SCALING
24-BIT
Σ-
MODULATOR
CLOCK
GENERATOR
INTERNAL TEMPERATURE SENSOR
05468-040
VOLTAGE
REFERENCE
DATA
IN
× I
V
BE
VDD
Figure 40. Internal Temperature Sensor
The temperature sensing method used in the AD7745/AD7746
is to measure a difference in VBE voltage of a transistor
operated at two different currents (see Figure 40). The VBE
change with temperature is linear and can be expressed as
)
ln(
)
(
N
q
KT
n
V
f
BE
×
=
where:
K is Boltzmann’s constant (1.38 × 10–23).
T is the absolute temperature in Kelvin.
q is the charge on the electron (1.6 × 10–19 coulombs).
N is the ratio of the two currents.
nf is the ideality factor of the thermal diode.
The AD7745/AD7746 uses an on-chip transistor to measure the
temperature of the silicon chip inside the package. The Σ-Δ
ADC converts the VBE to digital, the data are scaled using
factory calibration coefficients, thus the output code is
proportional to temperature:
()
4096
2048
=
°
Code
C
e
Temperatur
The AD7745/AD7746 has a low power consumption resulting
in only a small effect due to the part self-heating (less than
0.5°C at VDD = 5 V).
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| AD7746ARUZ-REEL7 | 功能描述:IC CONV 2CH CAP TO DGTL 16-TSSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - ADCs/DAC - 專用型 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:50 系列:- 類型:數(shù)據(jù)采集系統(tǒng)（DAS） 分辨率（位）:16 b 采樣率（每秒）:21.94k 數(shù)據(jù)接口:MICROWIRE?，QSPI?，串行，SPI? 電壓電源:模擬和數(shù)字 電源電壓:1.8 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:40-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:40-TQFN-EP（6x6） 包裝:托盤 |
| AD7747 | 制造商:AD 制造商全稱:Analog Devices 功能描述:24-Bit Capacitance-to-Digital Converter with Temperature Sensor |
| AD7747ARUZ | 功能描述:IC CONV 24BIT CAP-DGTL 16-TSSOP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - ADCs/DAC - 專用型 系列:- 產(chǎn)品培訓(xùn)模塊:Data Converter Basics 標(biāo)準(zhǔn)包裝:1 系列:- 類型:電機(jī)控制 分辨率（位）:12 b 采樣率（每秒）:1M 數(shù)據(jù)接口:串行，并聯(lián) 電壓電源:單電源 電源電壓:2.7 V ~ 3.6 V，4.5 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:100-TQFP 供應(yīng)商設(shè)備封裝:100-TQFP（14x14） 包裝:剪切帶 (CT) 其它名稱:296-18373-1 |
| AD7747ARUZ-REEL | 功能描述:IC CONV CAP TO DIG 24BIT 16TSSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - ADCs/DAC - 專用型 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:50 系列:- 類型:數(shù)據(jù)采集系統(tǒng)（DAS） 分辨率（位）:16 b 采樣率（每秒）:21.94k 數(shù)據(jù)接口:MICROWIRE?，QSPI?，串行，SPI? 電壓電源:模擬和數(shù)字 電源電壓:1.8 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:40-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:40-TQFN-EP（6x6） 包裝:托盤 |
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