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參數(shù)資料
| 型號： | AD7724ASTZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 9/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MOD SIGMA-DELTA DUAL 48LQFP |
| 標準包裝： | 1 |
| 類型： | 調(diào)制器 |
| 分辨率（位）： | 15 b |
| 采樣率（每秒）： | 250k |
| 數(shù)據(jù)接口： | 串行 |
| 電壓電源： | 模擬和數(shù)字 |
| 電源電壓： | 2.85 V ~ 5.25 V，4.75 V ~ 5.25 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-LQFP |
| 供應商設(shè)備封裝： | 48-LQFP（7x7） |
| 包裝： | 托盤 |
REV. B
–2–
AD7724–SPECIFICATIONS1(AVDD = 5 V 5%; DVDD = 5 V 5%, DVDD1 = 3 V 5%; AGND = DGND = 0 V,
fMCLK = 13 MHz ac-coupled sine wave, REF2A = REF2B = 2.5 V; TA = TMIN to TMAX, unless otherwise noted.)
Parameter
A Version
Unit
Test Conditions/Comments
STATIC PERFORMANCE
When Tested with Ideal FIR Filter as in Figure 1
Integral Nonlinearity
±0.003
% FSR typ
Offset Error
±0.24
% FSR typ
Gain Error
2
±0.6
% FSR typ
Offset Error Drift
±37.69
V/°C typ
Gain Error Drift
REF2 Is an Ideal Reference, REF1 = AGND
Unipolar Mode
±37.69
V/°C typ
Bipolar Mode
±18.85
V/°C typ
ANALOG INPUTS
Signal Input Span (VIN(+) – VIN(–))
Bipolar Mode
±V
REF2/2
V max
BIP = VIH
Unipolar Mode
0 to VREF2
V max
BIP = VIL
Maximum Input Voltage
AVDD
V
Minimum Input Voltage
0
V
Input Sampling Capacitance
2
pF typ
Input Sampling Rate
2 fMCLK
MHz
Differential Input Impedance
10
9/(8 f
MCLK)k
typ
REFERENCE INPUTS
REF1 Output Voltage
2.32 to 2.68
V min/max
REF1 Output Voltage Drift
60
ppm/
°C typ
REF1 Output Impedance
4
k
typ
Reference Buffer Offset Voltage
±12
mV max
Offset Between REF1 and REF2
Using Internal Reference
REF2 Output Voltage
2.32 to 2.68
V min/max
REF2 Output Voltage Drift
60
ppm/
°C typ
Using External Reference
REF1 = AGND
REF2 Input Impedance
109/(16 fMCLK)k
typ
External Reference Voltage Range
2.32 to 2.68
V min/max
Applied to REF1 or REF2
DYNAMIC SPECIFICATIONS
3
When Tested with Ideal FIR Filter as in Figure 1
Bipolar Mode
BIP = VIH, VCM = 2.5 V, VIN(+) = VIN(–) = 1.25 V p-p
or VIN(–) = 1.25 V, VIN(+) = 0 V to 2.5 V
Signal-to-(Noise + Distortion)
90
dB typ
Input BW = 0 kHz–94.25 kHz
86
dB min
Total Harmonic Distortion
–90
dB max
Input BW = 0 kHz–94.25 kHz
Spurious Free Dynamic Range
–90
dB max
Input BW = 0 kHz–94.25 kHz
Unipolar Mode
BIP = VIL, VIN(–) = 0 V, VIN(+) = 0 V to 2.5 V
Signal-to-(Noise + Distortion)
88
dB typ
Input BW = 0 kHz–94.25 kHz
Total Harmonic Distortion
–90
dB typ
Input BW = 0 kHz–101.556 kHz
Spurious Free Dynamic Range
–90
dB typ
Input BW = 0 kHz–101.556 kHz
Intermodulation Distortion
–93
dB typ
AC CMRR
96
dB typ
VIN(+) = VIN(–) = 2.5 V p-p, VCM = 1.25 V to
3.75 V, 20 kHz
CLOCK
Square Wave
4
MCLK Duty Ratio
45 to 55
% max
For Specified Operation
VMCLKH, MCLK High Voltage
4
V min
MCLK Uses CMOS Logic
VMCLKL, MCLK Low Voltage
0.4
V max
Sine Wave
XTAL1 Voltage Swing
0.4
V p-p min
XTAL_OFF Tied Low
4
V p-p max
LOGIC INPUTS
VIH, Input High Voltage
2.4
V min
VIL, Input Low Voltage
0.8
V max
IINH, Input Current
10
A max
CIN, Input Capacitance
10
pF max
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