- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄10257 > AD7715ARU-5REEL (Analog Devices Inc)IC ADC 16BIT SIGMA-DELTA 16TSSOP PDF資料下載
參數(shù)資料
| 型號： | AD7715ARU-5REEL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 15/40頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 16BIT SIGMA-DELTA 16TSSOP |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 500 |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 9.5mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-TSSOP |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 1 個差分，單極；1 個差分，雙極 |
| 配用： | EVAL-AD7715-3EBZ-ND - BOARD EVALUATION FOR AD7715 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁當(dāng)前第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁
AD7715
Rev. D | Page 22 of 40
Filter Characteristics
The AD7715’s digital filter is a low-pass filter with a (sinx/x)3
response (also called sinc3). The transfer function for this filter
is described in the z-domain by
3
1
)
(
×
=
z
N
z
H
N
and in the frequency domain by
3
1
)
(
×
π
×
π
×
=
S
f
Sin
f
N
Sin
N
f
H
where N is the ratio of the modulator rate to the output rate and
fMOD is the modulator rate.
Figure 6 shows the filter frequency response for a cutoff frequency
of 15.72 Hz which corresponds to a first filter notch frequency
of 60 Hz. The plot is shown from dc to 390 Hz. This response is
repeated at either side of the digital filter’s sample frequency
and at either side of multiples of the filter’s sample frequency.
FREQUENCY (Hz)
0
–40
–60
–80
–100
–120
–140
–160
–180
–200
–220
–20
–240
360
0
300
180
120
60
240
GA
IN
(
d
B
)
08
51
9-
0
06
Figure 6. Frequency Response of AD7715 Filter
The response of the filter is similar to that of an averaging filter
but with a sharper roll-off. The output rate for the digital filter
corresponds with the positioning of the first notch of the filter’s
frequency response. Thus, for the plot of Figure 6 where the
output rate is 60 Hz, the first notch of the filter is at 60 Hz. The
notches of this (sinx/x)3 filter are repeated at multiples of the
first notch. The filter provides attenuation of better than 100 dB
at these notches.
The cutoff frequency of the digital filter is determined by the
value loaded to the FS0 to FS1 bits in the setup register. program-
ming a different cutoff frequency via FS0 and FS1 does not alter
the profile of the filter response; it changes the frequency of the
notches. The output update of the part and the frequency of the
first notch correspond.
Because the AD7715 contains this on-chip, low-pass filtering,
there is a settling time associated with step function inputs and
data on the output is invalid after a step change until the settling
time has elapsed. The settling time depends upon the output
rate chosen for the filter. The settling time of the filter to a full-
scale step input can be up 4 times the output data period. For a
synchronized step input (using the FSYNC function), the
settling time is 3 times the output data period.
Post-Filtering
The on-chip modulator provides samples at a 19.2 kHz output
rate with fCLKIN at 2.4576 MHz. The on-chip digital filter decimates
these samples to provide data at an output rate that corresponds
to the programmed output rate of the filter. Because the output
data rate is higher than the Nyquist criterion, the output rate
for a given bandwidth satisfys most application requirements.
However, there may be some applications that require a higher
data rate for a given bandwidth and noise performance.
Applications that need this higher data rate do require some
post-filtering following the digital filter of the AD7715.
For example, if the required bandwidth is 7.86 Hz but the
required update rate is 100 Hz, the data can be taken from the
AD7715 at the 100 Hz rate giving a 3 dB bandwidth of 26.2 Hz.
Post-filtering can be applied to this to reduce the bandwidth
and output noise, to the 7.86 Hz bandwidth level, while
maintaining an output rate of 100 Hz.
Post-filtering can also be used to reduce the output noise from
the device for bandwidths below 13.1 Hz. At a gain of 128 and
a bandwidth of 13.1 Hz, the output rms noise is 520 nV. This is
essentially device noise or white noise and because the input is
chopped, the noise has a primarily flat frequency response. By
reducing the bandwidth below 13.1 Hz, the noise in the resultant
pass-band can be reduced. A reduction in bandwidth by a factor
of 2 results in a reduction of approximately 1.25 in the output
rms noise. This additional filtering results in a longer settling time.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MS3114E8-4S | CONN RCPT 4POS JAM NUT W/SCKT |
| LTC1402IGN#TR | IC ADC 12BIT 2.2MSPS SHDN 16SSOP |
| LTC2418IGN | IC ADC 24BIT DIFF INPUT 28SSOP |
| PX0413/02S/PC | CONN RCPT 2POS W/SCKT PCB MNT |
| VE-224-MX-F1 | CONVERTER MOD DC/DC 48V 75W |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD7715ARU-5REEL7 | 制造商:Analog Devices 功能描述:ADC Single Delta-Sigma 19.2ksps 16-bit Serial 16-Pin TSSOP T/R |
| AD7715ARUZ-3 | 功能描述:IC ADC 16BIT SIGMA-DELTA 16TSSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 其它有關(guān)文件:TSA1204 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):12 采樣率（每秒）:20M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:155mW 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應(yīng)商設(shè)備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數(shù)目和類型:4 個單端，單極；2 個差分，單極 產(chǎn)品目錄頁面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6 |
| AD7715ARUZ-31 | 制造商:AD 制造商全稱:Analog Devices 功能描述:3 V/5 V, 450 ??A 16-Bit, Sigma-Delta ADC |
| AD7715ARUZ-3REEL7 | 功能描述:IC ADC 16BIT SIGMA-DELTA 16TSSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 位數(shù):16 采樣率（每秒）:45k 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:315mW 電壓電源:模擬和數(shù)字 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:28-SOIC W 包裝:帶卷 (TR) 輸入數(shù)目和類型:2 個單端，單極 |
| AD7715ARUZ-3REEL71 | 制造商:AD 制造商全稱:Analog Devices 功能描述:3 V/5 V, 450 ??A 16-Bit, Sigma-Delta ADC |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。