參數(shù)資料
型號： AD7710ARZ-REEL
廠商： Analog Devices Inc
文件頁數(shù)： 30/32頁
文件大?。?/td> 0K
描述： IC ADC 24BIT DIFF INP 24-SOIC
標(biāo)準(zhǔn)包裝： 1,000
位數(shù)： 24
采樣率（每秒）： 1.03k
數(shù)據(jù)接口： 串行
轉(zhuǎn)換器數(shù)目： 1
功率耗散（最大）： 45mW
電壓電源： 模擬和數(shù)字，雙 ±
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 24-SOIC（0.295"，7.50mm 寬）
供應(yīng)商設(shè)備封裝： 24-SOIC W
包裝： 帶卷 (TR)
輸入數(shù)目和類型： 2 個差分，單極；2 個差分，雙極
AD7710
REV. G
–7–
PIN FUNCTION DESCRIPTIONS
Pin
Mnemonic
Function
1
SCLK
Serial Clock. Logic input/output, depending on the status of the MODE pin. When MODE is high, the
device is in its self-clocking mode, and the SCLK pin provides a serial clock output. This SCLK becomes
active when
RFS or TFS goes low, and it goes high impedance when either RFS or TFS returns high or when
the device has completed transmission of an output word. When MODE is low, the device is in its external
clocking mode, and the SCLK pin acts as an input. This input serial clock can be a continuous clock with all
data transmitted in a continuous train of pulses. Alternatively, it can be a noncontinuous clock with the
information being transmitted to the AD7710 in smaller batches of data.
2
MCLK IN
Master Clock Signal for the Device. This can be provided in the form of a crystal or external clock. A crystal
can be tied across the MCLK IN and MCLK OUT pins. Alternatively, the MCLK IN pin can be driven with
a CMOS compatible clock and MCLK OUT left unconnected. The clock input frequency is nominally 10 MHz.
3
MCLK OUT When the master clock for the device is a crystal, the crystal is connected between MCLK IN and MCLK OUT.
4A0Address Input. With this input low, reading and writing to the device is to the control register. With this
input high, access is to either the data register or the calibration registers.
5
SYNC
Logic Input. Allows for synchronization of the digital filters when using a number of AD7710s. It resets
the nodes of the digital filter.
6
MODE
Logic Input. When this pin is high, the device is in its self-clocking mode; with this pin low, the device is in
its external clocking mode.
7
AIN1(+)
Analog Input Channel 1. Positive input of the programmable gain differential analog input. The AIN1(+)
input is connected to an output current source that can be used to check that an external transducer has
burned out or gone open circuit. This output current source can be turned on/off via the control register.
8
AIN1(–)
Analog Input Channel 1. Negative input of the programmable gain differential analog input.
9
AIN2(+)
Analog Input Channel 2. Positive input of the programmable gain differential analog input.
10
AIN2(–)
Analog Input Channel 2. Negative input of the programmable gain differential analog input.
11
VSS
Analog Negative Supply, 0 V to –5 V. Tied to AGND for single-supply operation. The input voltage on
AIN1 or AIN2 should not go > 30 mV negative w.r.t. VSS for correct operation of the device.
12
AVDD
Analog Positive Supply Voltage, 5 V to 10 V.
13
VBIAS
Input Bias Voltage. This input voltage should be set such that VBIAS + 0.85
× VREF < AVDD and VBIAS –
0.85
× V
REF > VSS where VREF is REF IN(+) – REF IN(–). Ideally, this should be tied halfway between
AVDD and VSS. Thus with AVDD = 5 V and VSS = 0 V, it can be tied to REF OUT; with AVDD = 5 V
and VSS = –5 V, it can be tied to AGND; with AVDD = 10 V, it can be tied to 5 V.
14
REF IN(–)
Reference Input. The REF IN(–) can lie anywhere between AVDD and VSS provided REF IN(+) is greater
than REF IN(–).
15
REF IN(+)
Reference Input. The reference input is differential providing that REF IN(+) is greater than REF IN(–).
REF IN(+) can lie anywhere between AVDD and VSS.
16
REF OUT
Reference Output. The internal 2.5 V reference is provided at this pin. This is a single-ended output which
is referred to AGND. It is a buffered output which is capable of providing 1 mA to an external load.
17
IOUT
Compensation Current Output. A 20
A constant current is provided at this pin. This current can be used in
association with an external thermistor to provide cold junction compensation in thermocouple applications.
This current can be turned on or off via the control register.
18
AGND
Ground Reference Point for Analog Circuitry.
相關(guān)PDF資料
PDF描述
VE-BNJ-MW-F2 CONVERTER MOD DC/DC 36V 100W
VI-22M-IW-F3 CONVERTER MOD DC/DC 10V 100W
VE-B4R-MY CONVERTER MOD DC/DC 7.5V 50W
LTC2852HS#TRPBF IC TXRX RS485/RS422 14SOIC
MS3102A24-12PX CONN RCPT 5POS BOX MNT W/PINS
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD7710ARZ-REEL7 功能描述:IC ADC 24BIT DIFF INP 24SOIC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:microPOWER™ 位數(shù):8 采樣率（每秒）:1M 數(shù)據(jù)接口:串行，SPI? 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:- 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:24-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-VQFN 裸露焊盤（4x4） 包裝:Digi-Reel® 輸入數(shù)目和類型:8 個單端，單極 產(chǎn)品目錄頁面:892 (CN2011-ZH PDF) 其它名稱:296-25851-6
AD7710SQ 制造商:Analog Devices 功能描述:ADC SGL DELTA-SIGMA 1.028KSPS 24BIT SERL 24CDIP - Rail/Tube 制造商:Analog Devices 功能描述:IC ADC 24BIT DIFF INP 24-CDIP 制造商:Analog Devices 功能描述:IC ADC 24BIT SERIAL DIP-24 制造商:Analog Devices 功能描述:IC, ADC, 24BIT, SERIAL, DIP-24 制造商:Analog Devices Inc. 功能描述:Analog to Digital Converters - ADC 24 BIT SIGMA DELTA ADC IC 制造商:Analog Devices 功能描述:IC, ADC, 24BIT, SERIAL, DIP-24; Resolution (Bits):24bit; Supply Voltage Type:Single; Supply Voltage Min:5V; Supply Voltage Max:10V; Supply Current:4mA; Digital IC Case Style:DIP; No. of Pins:24; Input Channel Type:Differential 制造商:Analog Devices 功能描述:CONVERTER - ADC 制造商:Analog Devices 功能描述:ADC Single Delta-Sigma 1.028ksps 24-bit Serial 24-Pin CDIP
AD7710SQ/883B 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog-to-Digital Converter， 24-Bit
AD7711 制造商:AD 制造商全稱:Analog Devices 功能描述:LC2MOS Signal Conditioning ADC with RTD Excitation Currents
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*